Panasonic JB-3300 Technical Manual page 144

Two types of data buses are provided to increase fan-out: bi-
directional and output-only data buses.
The bi-directional data bus is connected to I/O and memory for which
both input and output operations occur. The DT/R and DEN signals
output from the MPU bus controller control their directions and
output gates.
The output-only data bus is connected to an I/O to which only I/O
write occurs. The MPU cannot read data through this bus.
Two-way Bus Buffer
LS245
AD7 to <> AaB KC ~S Two-way Data Bus
ADO
DT/R
DEN
(c)
——————_{pIR
G
—>—_ LS244
DB7 to DBO
YA —Y ' Output-only Data Bus
DO7 to DOO
Figure 5-5 Block Diagram of Data Buses
The lower eight bits of the address bus are also connected via a bus
buffer for the sake of fan-out, creating XAB7-XABO.
Wait state generation circuit
The wait state generation circuit has two functions: it generates
wait cycles for the MPU, and it adjusts timing of the command signals
*MEMR, *MEMW, *IOR, and *IOW, which are output from the MPU bus
controller.
The timing of the command signals output from the MPU to the control
LSI of a peripheral device has to be adjusted. When an I/O
instruction is issued, therefore, the system generates two signals,
*PADVNC and *ADVNC, adjusts their timing in the two-way buffer, and
generates signals *XMEMR, *XMEMW, *XIOW, and *XIOR.
II - 24