Panasonic JB-3300 Technical Manual page 190

(3) Refresh address counter
The refresh address counter increments the VRAM refresh address
count each time a refresh cycle ends. Figure 5-45 shows a
refresh address counter circuit.
LS393
RESET
xX REFADR
x CLKI1
Figure 5-45 Refresh Address Counter Circuit
Figure 5-46 shows an operation timing chart.
cuxt | | | / l po
EN EVEN [ |
*CRT ADR
RAM WAIT |
*REF ADR | |
LS 393 | L | 1
Input d ?
RFA RFA(n) YX RFA (n +1) x RFA (n+2)
Address
Figure 5-46 Refresh Address Counter Timing Chart
II - 70