Omron CJ1W-EIP21 Operation Manuals page 416

Appendices
The device variables that correspond to bits 00 to 15 in words x to x+15 are given in the following
table.
I/O memory location in CJ-
series CPU Unit
Word address
Word x
Word x+1
Word x+2
Word x+3
Word x+4
Word x+5
Word x+6
A-42
Device variable for the CJ-series Unit in NJ-series CPU Unit
Bit number Variable name
0 *_x.RegTargetSta.Target-
Sta[0]
.
.
.
15 *_x.RegTargetSta.Target-
Sta[15]
0 *_x.RegTargetSta.Target-
Sta[16]
.
.
.
15 *_x.RegTargetSta.Target-
Sta[31]
0 *_x.RegTargetSta.Target-
Sta[32]
.
.
.
15 *_x.RegTargetSta.Target-
Sta[47]
0 *_x.RegTargetSta.Target-
Sta[48]
.
.
.
15 *_x.RegTargetSta.Target-
Sta[63]
0 *_x.RegTargetSta.Target-
Sta[64]
.
.
.
15 *_x.RegTargetSta.Target-
Sta[79]
0 *_x.RegTargetSta.Target-
Sta[80]
.
.
.
15 *_x.RegTargetSta.Target-
Sta[95]
0 *_x.RegTargetSta.Target-
Sta[96]
.
.
.
15 *_x.RegTargetSta.Target-
Sta[111]
CJ-series EtherNet/IP Units Operation Manual for NJ-series CPU Unit (W495)
Registered Target Node Table Bit for Node
Address 0
.
.
.
Registered Target Node Table Bit for Node
Address 15
Registered Target Node Table Bit for Node
Address 16
.
.
.
Registered Target Node Table Bit for Node
Address 31
Registered Target Node Table Bit for Node
Address 32
.
.
.
Registered Target Node Table Bit for Node
Address 47
Registered Target Node Table Bit for Node
Address 48
.
.
.
Registered Target Node Table Bit for Node
Address 63
Registered Target Node Table Bit for Node
Address 64
.
.
.
Registered Target Node Table Bit for Node
Address 79
Registered Target Node Table Bit for Node
Address 80
.
.
.
Registered Target Node Table Bit for Node
Address 95
Registered Target Node Table Bit for Node
Address 96
.
.
.
Registered Target Node Table Bit for Node
Address 111
Description
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