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SLM-7650 Satellite Modem
Theory of Operation
The modulated IF signal at 70 ± 20 MHz or 140 ± 40 MHz enters the IF section for
conversion to I and Q analog baseband channels. The I and Q channels are then passed
through identical anti-alias filters, offset amplifiers, and DAC. The digitized I and Q data
is then sent to the digital Nyquist filters, resulting in a filtered, digital representation of
the received signal. The digital data is then sent to four separate circuits:
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The AGC provides a gain feedback signal to the IF section to ensure that the digital
representation of the I and Q channels is optimized for the Costas and Clock loops, as
well as the soft decision mapping circuitry.
The digital Costas loop, in conjunction with a DDS, performs the carrier recovery
function. The Costas loop consists of a Costas phase detector, loop filter, and DDS, all
implemented digitally.
The DDS performs the function of a Voltage-Controlled Oscillator (VCO) in an analog
implementation, but can be easily programmed to the desired center frequency via the
M&C.
The output of the DDS is sent to the IF section, providing the reference to which the
quadrature local oscillator is locked. The M&C sweeps the local oscillator (via DDS
programming) through the user specified sweep range.
When the active decoder (Viterbi, trellis, TPC, or uncoded) determines that the modem is
locked, the M&C stops the sweep and begins the de-stress process. This involves fine-
tuning the DDS based on the phase error in the Costas loop. The de-stress process
continues as long as the modem is locked. If the carrier is interrupted, the M&C resumes
the sweep process.
The digital clock loop, in conjunction with another DDS, performs the clock recovery
function. The clock loop consists of a phase detector, loop filter, and DDS, all
implemented digitally. The DDS performs the function of a VCO in an analog
implementation, but can be easily programmed to the desired center frequency via the
M&C. The recovered data and symbol clocks are then used throughout the demodulator.
The soft decision mapper converts the digital I and Q data to 3-bit soft decision values.
These values are then fed to the programmable vector rotation circuit, providing
compatibility with spectrum reversal of the I and Q channels.
Automatic Gain/Offset Control
Carrier Recovery (Costas) Loop
Clock Recovery Loop
Soft Decision Mapping
4–15
Revision 4
MN/SLM7650.IOM
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