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32579B
Table 3-2.
Ball
I/O
No.
Signal Name
(PU/PD)
U30
BIT_CLK
I
F_TRDY#
O
U31
SDATA_IN
I
F_GNT0#
O
V1
IDE_DATA15
I/O
TFTD7
O
V2
IDE_DATA14
I/O
TFTD17
O
V3
IDE_DATA13
I/O
TFTD15
O
V4
V
GND
SS
V13
V
PWR
CORE
V14
V
PWR
CORE
V15
V
GND
SS
V16
V
GND
SS
V17
V
GND
SS
V18
V
PWR
CORE
V19
V
PWR
CORE
V28
V
GND
SS
V29
SDCLK3
O
V30
GXCLK
O
FP_VDD_ON
O
TEST3
O
V31
GPIO16
I/O
(PU
22.5
PC_BEEP
O
F_DEVSEL#
O
W1
V
PWR
IO
W2
V
GND
SS
W3
IDE_DATA12
I/O
TFTD13
O
W4
IDE_DATA11
I/O
GPIO41
I/O
W13
V
PWR
CORE
W14
V
PWR
CORE
W15
V
GND
SS
W16
V
GND
SS
W17
V
GND
SS
W18
V
PWR
CORE
36
BGU481 Ball Assignment - Sorted by Ball Number (Continued)
1
Buffer
Power
Type
Rail
Configuration
IN
V
FPCI_MON = 0
T
IO
O
FPCI_MON = 1
1/4
IN
V
FPCI_MON = 0
T
IO
O
FPCI_MON = 1
2/5
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
O
PMR[24] = 1
1/4
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
O
PMR[24] = 1
1/4
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
O
PMR[24] = 1
1/4
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
O
V
---
2/5
IO
O
V
(PMR[29] = 0 and
2/5
IO
3
PMR[23]
= 0) or
3
(PMR[23]
= 1 and
PMR[15] = 1)
O
3
PMR[23]
= 1 and
1/4
PMR[15] = 0
O
PMR[29] = 1 and
2/5
3
PMR[23]
= 0
IN
, O
V
PMR[0] = 0 and
T
2/5
IO
)
FPCI_MON = 0
O
PMR[0] = 1 = 0 and
2/5
FPCI_MON = 0
O
FPCI_MON = 1
2/5
---
---
---
---
---
---
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
O
PMR[24] = 1
1/4
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
IN
,
PMR[24] = 1
TS1
O
1/4
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
Ball
I/O
No.
Signal Name
(PU/PD)
W19
V
PWR
CORE
6
MD57
I/O
W28
W29
SDCLK1
O
W30
V
GND
SS
W31
V
PWR
IO
5
IDE_DATA10
I/O
Y1
DDC_SCL
O
5
IDE_DATA9
I/O
Y2
DDC_SDA
I/O
Y3
IDE_DATA8
I/O
GPIO40
I/O
Y4
IDE_IOR0#
O
TFTD10
O
6
MD58
I/O
Y28
6
MD59
I/O
Y29
6
MD60
I/O
Y30
6
MD56
I/O
Y31
AA1
IDE_RST#
O
TFTDCK
O
AA2
IDE_DATA7
I/O
INTD#
I
AA3
IDE_DATA6
I/O
IRQ9
I
AA4
IDE_DATA5
I/O
CLK27M
O
AA28
SDCLK2
O
6
MD61
I/O
AA29
6
MD62
I/O
AA30
6
MD63
I/O
AA31
AB1
IDE_DATA4
I/O
FP_VDD_ON
O
AB2
V
GND
SS
AB3
V
PWR
IO
AB4
IDE_DATA3
I/O
TFTD12
O
6
MD24
I/O
AB28
AB29
V
PWR
IO
AB30
V
GND
SS
AB31
DQM7
O
AMD Geode™ SC1200/SC1201 Processor Data Book
Signal Definitions
1
Buffer
Power
Type
Rail
Configuration
---
---
---
IN
, TS
V
---
T
2/5
IO
O
V
---
2/5
IO
---
---
---
---
---
---
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
OD
PMR[24] = 1
4
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
IN
, OD
PMR[24] = 1
T
4
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
IN
,
PMR[24] = 1
TS1
O
1/4
O
V
PMR[24] = 0
1/4
IO
O
PMR[24] = 1
1/4
IN
, TS
V
---
T
2/5
IO
IN
, TS
V
---
T
2/5
IO
IN
, TS
V
---
T
2/5
IO
IN
, TS
V
---
T
2/5
IO
O
V
PMR[24] = 0
1/4
IO
O
PMR[24] = 1
1/4
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
IN
PMR[24] = 1
TS
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
IN
PMR[24] = 1
TS1
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
O
PMR[24] = 1
1/4
O
V
---
2/5
IO
IN
, TS
V
---
T
2/5
IO
IN
, TS
V
---
T
2/5
IO
IN
, TS
V
---
T
2/5
IO
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
O
PMR[24] = 1
1/4
---
---
---
---
---
---
IN
,
V
PMR[24] = 0
TS1
IO
TS
1/4
O
PMR[24] = 1
1/4
IN
, TS
V
---
T
2/5
IO
---
---
---
---
---
---
O
V
---
2/5
IO
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