Table 5-56. Bank 1 Bit Map; Table 5-57. Bank 2 Bit Map; Table 5-58. Bank 3 Bit Map; Table 5-59. Bank 4 Bit Map - AMD Geode SC1200 Data Book

SuperI/O Module
Register
Offset Name
00h LBGD(L)
01h LBGD(H)
02h RSVD
03h LCR BKSE
BSR BKSE
04h-07h RSVD
Register
Offset Name
00h BGD(L)
01h BGD(H)
02h EXCR1 BTEST
03h BSR BKSE
04h EXCR2 LOCK
05h RSVD
06h TXFLV
07h RXFLV
Register
Offset Name
00h MID
01h 1 RSVD
SH_LCR
02h 2
SH_FCR
03h BSR BKSE
04h-07h RSVD
1. LCR Register Value
2. FCR Register Value
Register
Offset Name
00h TMR(L)
01h TMR(H)
02h IRCR1
03h BSR BKSE
04h TFRL(L)/
TFRCC(L)
05h TFRL(H)/
TFRCC(H)
AMD Geode™ SC1200/SC1201 Processor Data Book

Table 5-56. Bank 1 Bit Map

7 6 5
SBRK STKP

Table 5-57. Bank 2 Bit Map

7 6 5
RSVD ETDLBK
RSVD PRESL[1:0]
RSVD
RSVD

Table 5-58. Bank 3 Bit Map

7 6 5
MID[3:0]
SBRK STKP
RXFTH[1:0] TXFTH[1:0]

Table 5-59. Bank 4 Bit Map

7 6 5
RSVD
RSVD
TFRL[7:0] / TFRCC[7:0] (Low Byte Data)
RSVD
Bits
4 3
LBGD[7:0] (Low Byte Data)
LBGD[15:8] (High Byte Data)
RSVD
EPS PEN
BSR[6:0] (Bank Select)
RSVD
Bits
4 3
BGD[7:0] (Low Byte Data)
BGD[15:8] (High Byte Data)
LOOP DMASWP
BSR[6:0] (Bank Select)
RF_SIZ[1:0]
RSVD
TFL[5:0]
RFL[5:0]
Bits
4 3
EPS PEN
RSVD
BSR[6:0] (Bank Select)
Reserved
Bits
4 3
TMR[7:0] (Low Byte Data)
TMR[11:8] (High Byte Data)
IR_SL[1:0]
BSR[6:0] (Bank Select)
TFRL[12:8] / TFRCC[12:8] (High Byte Data)
32579B
2 1
STB WLS[1:0]
2 1
DMATH DMANF EXT_SL
TF_SIZ[1:0]
2 1
RID[3:0]
STB WLS[1:0]
TXSR RXSR FIFO_EN
2 1
CTEST TMR_EN
0
0
0
0
139