Table 5-50. Bank 3 Register Map; Table 5-51. Bank 4 Register Map; Table 5-52. Bank 5 Register Map - AMD Geode SC1200 Data Book

SuperI/O Module
Offset Type
00h RO
01h RO
02h RO
03h R/W
04h-07h ---
Offset Type
00h RO
01h RO
02h R/W
03h R/W
04h R/W
RO
05h R/W
RO
06h R/W
RO
07h R/W
RO
Offset Type
00h R/W
01h R/W
02h R/W
03h R/W
04h R/W
05h RO
06h RO
RO
07h RO
AMD Geode™ SC1200/SC1201 Processor Data Book

Table 5-50. Bank 3 Register Map

Name
MID. Module and Revision Identification
SH_LCR. Link Control Shadow
SH_FCR. FIFO Control Shadow
BSR. Bank Select
RSVD. Reserved

Table 5-51. Bank 4 Register Map

Name
TMR(L). TImer (Low Byte)
TMR(H). Timer (High Byte)
IRCR1. IR Control 1
BSR. Bank Select
TFRL(L). Transmission Frame Length (Low Byte)
TFRCC(L). Transmission Current Count (Low Byte)
TFRL(H). Transmission Frame Length (High Byte)
TFRCC(H). Transmission Current Count (High Byte)
RFRML(L). Reception Frame Maximum Length (Low Byte)
RFRCC(L). Reception Frame Current Count (Low Byte)
RFRML(H). Reception Frame Maximum Length (High Byte)
RFRCC(H). Reception Frame Current Count (High Byte)

Table 5-52. Bank 5 Register Map

Name
SPR3. Scratchpad 2
SPR3. Scratchpad 3
RSVD. Reserved
BSR. Bank Select
IRCR2. IR Control 2
FRM_ST. Frame Status
RFRL(L). Received Frame Length (Low Byte)
LSTFRC. Lost Frame Count
RFRL(H). Received Frame Length (High Byte)
32579B
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