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Signal Definitions
Table 3-2.
Ball
I/O
No.
Signal Name
(PU/PD)
N15
V
GND
SS
N16
V
GND
SS
N17
V
GND
SS
N18
V
PWR
CORE
N19
V
PWR
CORE
N28
V
GND
SS
N29
GPIO12
I/O
(PU
22.5
AB2C
I/O
(PU
22.5
N30
AB1D
I/O
(PU
22.5
GPIO1
I/O
(PU
22.5
IOCS1#
O
N31
AB1C
I/O
(PU
22.5
GPIO20
I/O
(PU
22.5
DOCCS#
O
P1
AD4
I/O
A4
O
P2
IDE_CS1#
O
TFTDE
O
P3
AD1
I/O
A1
O
P4
V
PWR
CORE
P13
V
PWR
CORE
P14
V
PWR
CORE
P15
V
GND
SS
P16
V
GND
SS
P17
V
GND
SS
P18
V
PWR
CORE
P19
V
PWR
CORE
P28
V
PWR
CORE
P29
SDATA_OUT
O
TFT_PRSNT
I
(PD
100
P30
SYNC
O
CLKSEL3
I
(PD
100
P31
AC97_CLK
O
R1
V
GND
SS
R2
V
GND
SS
AMD Geode™ SC1200/SC1201 Processor Data Book
BGU481 Ball Assignment - Sorted by Ball Number (Continued)
1
Buffer
Power
Type
Rail
Configuration
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
IN
,
V
PMR[19] = 0
AB
IO
)
O
8/8
IN
,
PMR[19] = 1
AB
)
OD
8
IN
,
V
3
PMR[23]
= 0 or
AB
IO
)
OD
(PMR[23] = 1 and
8
PMR[15] = 1)
IN
, O
3
PMR[23]
= 1 and
T
3/5
)
PMR[15] = 0 and
PMR[13] = 0
O
3
PMR[23]
= 1 and
3/5
PMR[15] = 0 and
PMR[13] = 1
IN
,
V
3
PMR[23]
= 0 or
AB
IO
)
OD
(PMR[23] = 1 and
8
PMR[15] = 1)
IN
, O
3
PMR[23]
= 1 and
T
3/5
)
PMR[15] = 0 and
PMR[7] = 0
O3/5
3
PMR[23]
= 1 and
PMR[15] = 0 and
PMR[7] = 1
IN
,
V
Cycle Multiplexed
PCI
IO
O
PCI
O
PCI
O
V
PMR[24] = 0
1/4
IO
O
PMR[24] = 1
1/4
IN
,
V
Cycle Multiplexed
PCI
IO
O
PCI
O
PCI
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
O
V
---
AC97
IO
IN
V
Strap (See Table 3-
STRP
IO
)
4 on page 44.)
O
V
---
AC97
IO
IN
Strap (See Table 3-
STRP
)
4 on page 44.)
O
V
PMR[25] = 1
2/5
IO
---
---
---
---
---
---
Ball
I/O
No.
Signal Name
(PU/PD)
R3
V
GND
SS
R4
V
GND
SS
R13
V
GND
SS
R14
V
GND
SS
R15
V
GND
SS
R16
V
GND
SS
R17
V
GND
SS
R18
V
GND
SS
R19
V
GND
SS
R28
V
GND
SS
R29
V
GND
SS
R30
V
GND
SS
R31
V
GND
SS
T1
V
PWR
CORE
T2
V
PWR
CORE
T3
V
PWR
CORE
T4
V
PWR
CORE
T13
V
GND
SS
T14
V
GND
SS
T15
V
GND
SS
T16
V
GND
SS
T17
V
GND
SS
T18
V
GND
SS
T19
V
GND
SS
T28
V
PWR
CORE
T29
V
PWR
CORE
T30
V
PWR
CORE
T31
V
PWR
CORE
U1
AD0
I/O
A0
O
U2
IDE_ADDR2
O
TFTD4
O
U3
AD2
I/O
A2
O
U4
V
PWR
CORE
U13
V
GND
SS
U14
V
GND
SS
U15
V
GND
SS
U16
V
GND
SS
U17
V
GND
SS
U18
V
GND
SS
U19
V
GND
SS
U28
V
PWR
CORE
U29
AC97_RST#
O
F_STOP#
O
32579B
1
Buffer
Power
Type
Rail
Configuration
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
IN
,
V
Cycle Multiplexed
PCI
IO
O
PCI
O
PCI
O
V
PMR[24] = 0
1/4
IO
O
PMR[24] = 1
1/4
IN
,
V
Cycle Multiplexed
PCI
IO
O
PCI
O
PCI
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
O
V
FPCI_MON = 0
2/5
IO
O
FPCI_MON = 1
2/5
35
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