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11
Test Support
This chapter describes the test methodology and the CP15 test registers for the ARM720T
processor synthesized logic and TCM. It contains the following sections:
11.1
About the ARM720T test registers...........................................................11-1
11.2
Automatic Test Pattern Generation (ATPG)............................................11-2
11.3
Test State Register ....................................................................................11-3
11.4
Cache test registers and operations .........................................................11-3
11.5
MMU test registers and operations..........................................................11-8
11.1
About the ARM720T test registers
Coprocessor 15 register c15 of the ARM720T processor is used to provide device-specific test
operations. You can use it to access and control the following:
Test State Register
•
Cache test registers and operations
•
MMU test registers and operations
•
You must only use these operations for test. The
describes this register as implementation defined.
The format of the CP15 test operations is:
MCR/MRC p15, opcode_1, <Rd>, c15, <CRm>, <opcode_2>
31
The L bit distinguishes between an MCR (L set to 1) and an MRC (L set to 0).
ARM720T CORE CPU MANUAL
on page 11-3
UNP
Figure 11-1 CP15 MRC and MCR bit pattern
EPSON
on page 11-3
on page 11-8.
ARM Architecture Reference Manual
14 13 12
10 09 08 07 06 05 04 03 02 01 00
V
UNP
R S B L D P W C A M
11: Test Support
11-1
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