Epson ARM720T Core Cpu Manual page 215

Revision 4 (amba ahb bus interface version)
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Saved Program Status Register
The Saved Program Status Register which is associated with the current
processor mode and is undefined if there is no such Saved Program Status
Register, as in User mode or System mode.
See also
See
SBO
See
SBZ
Should Be One fields
Should be written as one (or all ones for bit fields) by software. Values other
than one produces Unpredictable results.
See also
Should Be Zero fields
Should be written as zero (or all 0s for bit fields) by software. Values other
than zero produce Unpredictable results.
See also
Software Interrupt Instruction
This instruction (SWI) enters Supervisor mode to request a particular
operating system function.
See
SPSR
A register or variable pointing to the top of a stack. If the stack is full stack
Stack pointer
the SP points to the most recently pushed item, else if the stack is empty,
the SP points to the first empty location, where the next item will be
pushed.
See
Status registers
See
SP
See
SWI
See
TAP
ARM720T CORE CPU MANUAL
Program Status Register.
Should Be One fields.
Should Be Zero fields.
Should Be Zero fields.
Should Be One fields.
Saved Program Status Register.
Program Status Register.
Stack pointer
Software Interrupt Instruction.
Test access port
.
EPSON
Glossary
Glossary-5

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