Epson ARM720T Core Cpu Manual page 29

Operation
Load Word
Word with User Mode privilege
Byte
Byte with User Mode privilege
Byte signed
Halfword
Halfword signed
Multiple block Increment before
data
operations
Increment after
Decrement before
Decrement after
Stack operations
Stack operations, and restore
CPSR
User registers
Store Word
Word with User Mode privilege
Byte
Byte with User Mode privilege
Halfword
Multiple block Increment before
data
operations
Increment after
Decrement before
Decrement after
Stack operations
User registers
Swap Word
Byte
ARM720T CORE CPU MANUAL
Table 1-2 ARM instruction summary (continued)
EPSON
Assembler
LDR{cond} <Rd>, <a_mode2>
LDR{cond}T <Rd>, <a_mode2P>
LDR{cond}B <Rd>, <a_mode2>
LDR{cond}BT <Rd>, <a_mode2P>
LDR{cond}SB <Rd>, <a_mode3>
LDR{cond}H <Rd>, <a_mode3>
LDR{cond}SH <Rd>, <a_mode3>
LDM{cond}IB <Rd>{!}, <reglist>{^}
LDM{cond}IA <Rd>{!}, <reglist>{^}
LDM{cond}DB <Rd>{!}, <reglist>{^}
LDM{cond}DA <Rd>{!}, <reglist>{^}
LDM{cond}<a_mode4L> <Rd>{!}, <reglist>
LDM{cond}<a_mode4L> <Rd>{!}, <reglist+pc>^
LDM{cond}<a_mode4L> <Rd>{!}, <reglist>^
STR{cond} <Rd>, <a_mode2>
STR{cond}T <Rd>, <a_mode2P>
STR{cond}B <Rd>, <a_mode2>
STR{cond}BT <Rd>, <a_mode2P>
STR{cond}H <Rd>, <a_mode3>
STM{cond}IB <Rd>{!}, <reglist>{^}
STM{cond}IA <Rd>{!}, <reglist>{^}
STM{cond}DB <Rd>{!}, <reglist>{^}
STM{cond}DA <Rd>{!}, <reglist>{^}
STM{cond}<a_mode4S> <Rd>{!}, <reglist>
STM{cond}<a_mode4S> <Rd>{!}, <reglist>^
SWP{cond} <Rd>, <Rm>, [<Rn>]
SWP{cond}B <Rd>, <Rm>, [<Rn>]
1: Introduction
1-9