Table of Contents
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10.1
About the ETM interface .......................................................................... 10-1
10.2
Enabling and disabling the ETM7 interface ............................................. 10-1
10.3
ARM720T processor................................................................................ 10-2
10.4
Clocks and resets .................................................................................... 10-3
10.5
Debug request wiring............................................................................... 10-3
10.6
TAP interface wiring ................................................................................ 10-3
11.1
About the ARM720T test registers .......................................................... 11-1
11.2
Automatic Test Pattern Generation (ATPG) ............................................ 11-2
11.3
Test State Register .................................................................................. 11-3
11.4
Cache test registers and operations ........................................................ 11-3
11.5
MMU test registers and operations.......................................................... 11-8
A.1
AMBA interface signals .............................................................................A-1
A.2
Coprocessor interface signals ...................................................................A-2
A.3
JTAG and test signals ...............................................................................A-3
A.4
Debugger signals.......................................................................................A-4
A.5
Embedded trace macrocell interface signals .............................................A-5
A.6
ATPG test signals......................................................................................A-7
A.7
Miscellaneous signals................................................................................A-7
Glossary
Index
ARM720T CORE CPU MANUAL
EPSON
CONTENTS
iii
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Table of Contents
