Coprocessor Interface Signals - Epson ARM720T Core Cpu Manual

Revision 4 (amba ahb bus interface version)
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8.2

Coprocessor interface signals

The signals used to interface the ARM720T core to a coprocessor are grouped into four
categories.
The clock and clock control signals include the main processor clock and bus reset:
HCLK
EXTCPCLKEN
HRESETn.
The pipeline-following signals are:
CPnMREQ
CPnTRANS
CPnOPC
CPTBIT.
The handshake signals are:
CPnCPI
EXTCPA
EXTCPB.
The data signals are:
EXTCPDIN[31:0]
EXTCPDOUT[31:0]
EXTCPDBE.
These signals and their use are described in:
Pipeline-following signals
Coprocessor interface handshaking
Connecting coprocessors
Not using an external coprocessor
Undefined instructions
Privileged instructions
ARM720T CORE CPU MANUAL
on page 8-4
on page 8-5
on page 8-9
on page 8-10
on page 8-10
on page 8-10
EPSON
8: Coprocessor Interface
8-3

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