Domain Access Control; Figure 7-13 Domain Access Control Register Format; Table 7-10 Interpreting Access Control Bits In Domain Access Control Register - Epson ARM720T Core Cpu Manual

7.6

Domain access control

MMU accesses are primarily controlled through the use of domains. There are 16 domains and
each has a 2-bit field to define access to it. Two types of user are supported, clients and
managers. The domains are defined in the Domain Access Control Register. Figure 7-13 shows
how the 32 bits of the register are allocated to define the 16 2-bit domains.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
15 14
Table 7-10 defines how the bits within each domain are interpreted to specify the access
permissions.

Table 7-10 Interpreting access control bits in Domain Access Control Register

Value Meaning
b00 No access
b01 Client
b10 Reserved
b11 Manager
ARM720T CORE CPU MANUAL
13 12 11 10 9

Figure 7-13 Domain Access Control Register format

Description
Any access generates a domain fault
Accesses are checked against the access
permission bits in the section or page descriptor
Reserved. Currently behaves like the no access
mode
Accesses are not checked against the access
permission bits so a permission fault cannot be
generated
8 7 6 5 4 3
EPSON
7: Memory Management Unit
2 1 0
7-17