Paradyne 9161 Reference Manual page 81

Setting Up
4-38
Table 4-7. Signaling and Trunk Conditioning Values (1 of 2)
Network
Meaning
Side Value
None No signaling used on this DS0. Use this setting if there is
no voice signaling information being passed on this DS0
(clear channel).
RBS Robbed Bit Signaling is used on this DS0, but no trunk
(default) conditioning. Signaling bits will be passed to the T1
interface to which this DS0 is cross-connected when this
T1 interface is not in CGA, but the signaling bits will be all
ones when CGA is present.
The following values will configure the cross-connect for RBS, as well as perform the
trunk conditioning indicated when a CGA condition occurs. Although the ABCD signaling
bits for each setting are described, only AB bits are transmitted when the
cross-connected T1 interface is using D4 framing.
E&M-idle The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the idle state for an E&M
interface (ABCD = 0000).
E&M-busy The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the busy state for an
E&M interface (ABCD = 1111).
FXOg-idle The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the idle state for an FXO
Ground-Start interface (ABCD = 1111).
FXOg-busy The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the busy state for an
FXO Ground-Start interface (ABCD = 0101).
FXOl-idle The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the idle state for an FXO
Loop-Start interface (ABCD = 0101).
FXOl-busy The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the busy state for an
FXO Loop-Start interface (ABCD = 0101).
FXSg-idle The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the idle state for an FXS
Ground-Start interface (ABCD = 0101).
FXSg-busy The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the busy state for an
FXS Ground-Start interface (ABCD = 1111).
FXSl-idle The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the idle state for an FXS
Loop-Start interface (ABCD = 0101).
FXSl-busy The signaling bits transmitted to the cross-connected T1
interface during a CGA represent the busy state for an
FXS Loop-Start interface (ABCD = 1111).
September 1997
DSX-1 Side
Default
Value
None
RBS
E&M idle
E&M busy
FXSg-idle
FXSg-busy
FXSl-idle
FXSl-busy
FXOg-idle
FXOg-busy
FXOl-idle
FXOl-busy
9161-A2-GH30-20