Programming Bit Stream File Into Qspi Flash - Terasic Mercury A2700 User Manual

Table 4-1 shows the memory map for the on-board flash. This memory provides
non-volatile storage space for two FPGA bit-streams, and FPL option bits for PFL II
configuration bits and board information. For the factory and user code to run correctly
and update designs in the user memory, this FPL option bit address (0x00002000)
must not be altered.
Block Description
PFL option bits
Factory image
User image
The PFL option bits contain the image location of the Factory image and User
image, so the PLF II IP in the System MAX10 FPGA can know where to find the FPGA
configuration data. If developers erase all flash content,
option is reprogrammed with the FPGA configuration
For user's application, the User image is stored with start address 0x08000000. Users
also can overwrite the Factory hardware on their application. Factory image is stored
with start address 0x00004000. We strongly recommend users to use the batch file in
the AVSTx8_Restored folder to write the FPGA configuration bit stream and option bit
data into the QSPI Flash.
3.3 Programming Bit Stream File Into
QSPI Flash
This section will introduce how to allow users to program the bit stream file generated
by their own project into the QSPI Flash on the MA27 board, so that the design file can
be automatically loaded into the FPGA and executed after the board power on.
The QSPI Flash of the MA27 board can only be programmed from the Host PC through
the JTAG interface. The QSPI Flash is connected to the system MAX10 FPGA on the
board. Before program the QSPI flash, users must set MSEL[2:0]=110 for AVSTx8
MA27
User Manual
Table 4-1 Flash Memory Map (Byte Address)
Size(MB)
0x00002000 – 0x00003FFF
-
0x00004000 – 0x07FFFFFF
~128
0x08000000 – 0x0FFFFFFF
128
please ensure that the PFL
data.
89
Address Range
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February 17,
2024