Terasic Mercury A2700 User Manual page 5


AG1B027R29A1E2VB

2.7M logic elements (LEs)

287 Mb On-chip RAM (M20K and MLAB)

17,056 18-bit x 19-bit multipliers

4,510 Variable-precision DSP blocks
 FPGA Configuration

On-Board USB Blaster II (UB2) for FPGA programming and Debug

AVSTx8 Configure with 2Gbit QSPI Flash.

ASx4 Configure with 1Gbit QSPI Flash.
 FPGA Fabric

PCIe Gen5 x16 and CXL x16

Four DDR4 SO-DIMM Socket, shared with HPS.

Two QSFP-DD Port for 400(*2)/200/100/40/25/10 GbE network interface.

Two MCIO 8x connectors to support PCIe and CXL

2x5 Timing Expansion Header

U.FL clock input / output

1x5 Bracket LED Expansion Header

User LED x4, Button x2, DIP Switch x2
*1: CXL feature only available for AGILEX AGIB027R29A1E2VB (tra
nsceiver speed -1)
*2 : Only QSFP-DD B port can support
 HPS(Hard Processor System) Fabric

MicroSD Socket

One: DDR4 SO-DIMM Socket shared with FPGA

Gigabit Ethernet PHY with RJ45 Port

UART to USB Port

USB OTG with MicroUSB Connector

LED x1, Button x1, Cold Reset Button
MA27
User Manual
(*1)
5
(*1)
www.terasic.com
February 17,
2024