Terasic Mercury A2700 User Manual page 65

QSFPDDA_RX_n2
QSFPDDA_RX_n3
QSFPDDA_RX_n4
QSFPDDA_RX_n5
QSFPDDA_RX_n6
QSFPDDA_RX_n7
QSFPDDA_REFCLK_p
QSFPDDA_INITMODE
QSFPDDA_INTERRUPT_n
QSFPDDA_MOD_PRS_n
QSFPDDA_MOD_SEL_n
QSFPDDA_RST_n
QSFPDDA_SCL
QSFPDDA_SDA
Table 2-21 QSFP-DD Port B Pin Assignments, Schematic Signal Names, and
Schematic
Signal Name
QSFPDDB_TX_p0
QSFPDDB_TX_p1
MA27
User Manual
channel 1
Receiver inverted data of
channel 2
Receiver inverted data of
channel 3
Receiver inverted data of
channel 4
Receiver inverted data of
channel 5
Receiver inverted data of
channel 6
Receiver inverted data of
channel 7
QSFP-DD port A
transceiver reference clock
p
Initialization mode
Interrupt
Module Present
Module Select
Module Reset
2-wire serial interface clock
2-wire serial interface data
Functions
Description
Transmitter non-inverted
data of channel 0
Transmitter non-inverted
data of channel 1
65
Differential I/O
High Speed
PIN_LV79
Differential I/O
High Speed
PIN_LT82
Differential I/O
High Speed
PIN_LK79
Differential I/O
High Speed
PIN_LG82
Differential I/O
High Speed
PIN_KV79
Differential I/O
High Speed
PIN_KP82
Differential I/O
LVDS PIN_HJ68
1.2V PIN_KR59
1.2V PIN_KJ59
1.2V PIN_KF56
1.2V PIN_LH58
1.2V PIN_KU60
1.2V PIN_KR61
1.2V PIN_KU58
Agilex Pin
I/O Standard
Number
High Speed
PIN_JW77
Differential I/O
High Speed
PIN_JT74
Differential I/O
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February 17,
2024