1. Manuals
  2. Brands
  3. Terasic Manuals
  4. Computer Hardware
  5. THDB-HDMI
  6. User manual

Terasic THDB-HDMI User Manual

Hdmi video daughter board
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
THDB-HDMI
Terasic HDMI Video Daughter Board
User Manual
1

Advertisement

Table of Contents
loading

Related Manuals for Terasic THDB-HDMI

Summary of Contents for Terasic THDB-HDMI

  • Page 1 THDB-HDMI Terasic HDMI Video Daughter Board User Manual...

  • Page 2: Table Of Contents

    3.4 Operation..............................23 Chapter 4 Case Study ..................27 4.1 Overview ..............................27 4.2 System Function Block .......................... 27 4.3 NIOS Program ............................31 Chapter 5 Appendix ..................35 5.1 Revision History ............................ 35 5.2 Always Visit THDB-HDMI Webpage for Update.................. 35...

  • Page 3: Chapter 1 Introduction

    Connector) interface. Host boards, supporting HSTC-compliant connectors, can control the HDMI daughter board through the HSTC interface. This THDB-HDMI kit contains complete reference designs with source code written in Verilog and C, for HDMI signal transmitting and receiving. Based on reference designs, users can easily and quickly develop their applications.

  • Page 4: Assemble The Hdmi Board

    Figure 1-2 Connect HDMI daughter board to DE3 board Here are some places to get help if you encounter any problem:  Email to support@terasic.com  Taiwan: +886-3-570-0880  China : +86-27-8774-5390...

  • Page 5: Chapter 2 Hdmi Board

     Chapter 2 HDMI Board This chapter will illustrate technical details of HDMI board. Users may modify the reference designs for various purposes accordingly. This section describes the major features of the HDMI board.  Board Features:  One HSTC interface for connection purpose ...
  • Page 6 Up/down sampling between YCbCr 4:4:4 and YCbCr 4:2:2 Either for conversion from 12-bit/10-bit to component to 8-bit Support Gammat Metadata packet 10. Digital audio input interface supporting: o Up to four I2S interface supporting 8-channel audio, with sample rates of 32~192 kHz and sample sizes of 16~24 bits o S/PDIF interface supporting PCM, Dolby Digital, DTS digital audio at up to 192kHz frame rate...
  • Page 7 Separate 148.5 148.5 12/15/18 Embedded 148.5 148.5  HDMI Receiver Features: Dual-Port HDMI 1.4 receiver Compliant with HDMI 1.3, HDMI1.4a 3D,HDCP 1.4 and DVI 1.1 specifications Supporting link speeds of up to 2.25 Gbps (link clock rate of 225MHZ) Supporting diverse 3D formats which are compliant with HDMI 1.4a 3D specification. o Supporting 3D video up to 1080P@23.98/24/30Hz,1080i@50/59.94/60/Hz o Supporting formats: framing packing, side-by-side(half),top-and-bottom Various video input interface supporting digital video standards such as:...

  • Page 8: Layout And Componets

    temperature-invariant matching to the input transmission lines. 12. Integrated pre-programmed HDCP keys 13. Intelligent, programmable power management Table 2-2 lists the supported output video formats: Table 2-2 Output video formats supported by the HDMI board Output Pixel Clock Frequency(MHz) Color Video Hsync/ 480i...

  • Page 9: Block Diagram Of Hdmi Signal Transmission

    Figure 2-2 On the back of the HDMI board with HSTC connector and HDMI ports  The THDB-HDMI board includes the following key components:  Receiver (U3)  Receiver port 1/2 (J2/J3)  Transmitter (U6)  Transmitter port (J4) ...
  • Page 10 Figure 2-3 The block diagram of the HDMI signal transmission The host can use reset pin TX_RST_N to reset the transmitter, and listen to the interrupt pin TX_INT_N to detect change of the transmitter status. When interrupt happens, the host needs to read the internal register to find out which event is triggered and perform proper actions for the interrupt.

  • Page 11: Block Diagram Of Hdmi Signal Receiving

    This section describes the block diagram of HDMI signal receiving. Figure 2-4 shows the block diagram of HDMI signal receiving. Please refer to the schematic included in the CD for more details. The HDMI receiver is controlled through the I2C interface, where the host works as master and the transmitter works as a slave.

  • Page 12: Generate Pin Assignments

    Users can easily create the HDMI board pin assignments by utilizing the DE3_System Builder V 1.3.1 or later. Here are the procedures to generate a top-level project for THDB-HDMI. 1. Launch DE3-System Builder Add a DE3 board. Enable the HSTC-C connector and type desired pin pre-fix name in the...
  • Page 13 Add HDMI Board. Connect DE3 and HDMI Board by drag-and-drop the mouse.

  • Page 14: Pin Definition Of Hstc Connector

    Click “Generate” to generate the desired top-level and pin assignments for a HDMI project. This section describes pin definition of the HSTC interface onboard. All the control and data signals of HDMI transmitter and receiver are connected to the HSTC connector, so users can fully control the HDMI daughter board through the HSTC interface.
  • Page 17 Figure 2-5 HSTC Connector of HDMI board...
  • Page 18 The table below lists the HSMC signal direction and description. Note. The power pins are not shown in the table. Table 2-3 The HSTC pin definition of the THDB-HDMI board Signal Name Direction Description Number (FPGA View) RX_I2S[3] input I2S serial data output, doubles as DSD...
  • Page 19 RX_MUTE input Mute output, doubles as DSD Serial Right CH3 data output RX_RD[10] input Digital Video Output Pins. RX_DSD input DSD Serial Left CH3 data output RX_RD[9] input Digital Video Output Pins. RX_RD[8] input Digital Video Output Pins. RX_RD[7] input Digital Video Output Pins.
  • Page 20 HDMI Port 0 TX_GD[9] output Digital video input pins. TX_GD[10] output Digital video input pins. TX_RD[0] output Digital video input pins. TX_GD[11] output Digital video input pins. TX_RD[3] output Digital video input pins. TX_RD[1] output Digital video input pins. TX_RD[6] output Digital video input pins.
  • Page 21 TX_BD[5] output Digital video input pins. TX_WS output I2S word select input TX_BD[4] output Digital video input pins. TX_MCLK output Audio master clock input TX_BD[3] output Digital video input pins. TX_I2S[0] output I2S serial data input TX_BD[2] output Digital video input pins. TX_I2S[1] output I2S serial data input...

  • Page 22: Chapter 3 Demonstration

    The following items are required for transmission-only and loopback demonstrations.  Transmission-Only  THDB-HDMI x 1  DE3 Board x 1  LCD monitor with at least one HDMI input x 1...

  • Page 23: Setup The Demonstration

     HDMI Cable x 1  Loopback  THDB-HDMI x 1  DE3 Board x 1  LCD monitor with at least one HDMI input x 1  HDMI Source Device x 1  HDMI Cable x 2 Figure 3-1...

  • Page 24: Operation

    Video in HDMI Cable Figure 3-2 HDMI Loopback Demonstration Setup This section describes the procedures of running the demonstration.  FPGA Configuration Please follow the steps below to configure the FPGA.  Make sure hardware setup is completed.  Connect PC and DE3 with a USB cable. ...
  • Page 25  When LCD monitor is detected, the LED2 of DE3 will be turned on.  After approximately 10 seconds, a test pattern will be displayed on the LCD monitor. The first displayed pattern is 480p (720x480p60) pattern.  Press “BUTTON0” to change test patterns. Please refer to Table 4-2 for built-in test patterns.
  • Page 26 output color of the transmitter is RGB444 and RGB444, respectively. It implies there is no change of color format in between. Figure 3-5 NIOS program trace log of transmitting-only demonstration  HDMI Internal Loopback After FPGA is configured, please follow the steps below to run the HDMI loopback demonstration. ...
  • Page 27 Figure 3-6 shows the NIOS program trace log when a HDMI LCD source device is detected. It indicates the input video resolution is 1280 x 720 (VIC=4) with color space RGB444 and 36-bits color depth. Both input color and output color of the receiver and transmitter are configured as RGB444. In another words, the color format doesn’t change from the source to the LCD monitor during the loopback process.

  • Page 28: Chapter 4 Case Study

    This reference design shows how to use DE3 to control HDMI board. Please refer to the pervious chapter for the demonstration of this reference design. The source code of the reference design can be found in the THDB-HDMI CD under the directory of Examples folder. The demonstration includes the following two major functions: ...
  • Page 29 The NIOS program is designed to run on the on-chip memory. A customized I2S controller is designed to generate I2S 48K stereo audio for the HDMI transmitting-only mode. The audio data is stored in the on-chip memory and sent to the HDMI transmitter by NIOS II processor. The video pattern generator is designed to generate test patterns for HDMI transmitter-only mode.
  • Page 30 Table 4-1 LED Indications Description System is running. HDMI sink device is detected and synchronized. HDMI source device is detected and synchronized. Table 4-2 Button Operation Definition BUTTON Description Press to change active video format of the built-in video pattern generator. Press to change active video color space of the built-in video pattern generator.
  • Page 31  Receiver Controlled by NIOS II Processor The receiver is controlled by NIOS program through I2C interface. Based on I2C protocol, the NIOS program can read/ write the internal registers of the receiver, and control the behavior of the receiver. The revision number of receiver is either A1 or A2, which can be determined by querying the register 4 of receiver.

  • Page 32: Nios Program

    1600x1200p5 1920x1080i120 148.5 It also supports three color spaces, which are RGB444, YUV422, and YUV444. The required PCLK is generated from Megafunction ALTPLL and ALTPLL_RECONFIG IP. The required PLL-reconfigure data is stored in on-chip ROMs.  Video Source Selector The source selector is implemented using Megafunction LPM_MUX. This section describes the design flow and how Nios II processor controls transmitter and receiver.
  • Page 33 beep.c includes audio raw data for generating a tone sound. The folder named terasic_lib includes the I2C driver. The folder named HDMI_Lib includes transmitter and receiver drivers. The platform-dependent functions are located in mcu.c under HDMI_Lib. Figure 4-3 NIOS Program File List...
  • Page 34  System Configuration To use the HDMI library in NIOS II, the const _MCU_ should be defined in the configuration settings, as shown in Figure 4-4. Two on-chip memories are created to store the NIOS program and data separately. The size of each on-chip memory is 128 K bytes. One on-chip memory is used to store program and the other one is used to store data.
  • Page 35 Figure 4-5 Configuration of System Library  Audio Test If users would like to test audio during HDMI transmitting-only mode, please remove the constant definition TX_VPG_COLOR_CTRL_DISABLED from main.c. Users will hear a tone sound from the built-in speaker of HDMI LCD monitor when pressing BUTTON1 of DE3 board.

  • Page 36: Chapter 5 Appendix

    Support Receiver Revision A2 JAN 04 2010 Figure 2-1 Corrected MAR 09 2011 Support HDMI 1.4 AUG 01 2017 Contact Information We will be continuing providing interesting examples and labs on our THDB-HDMI web page. Please visit www.altera.com or hdmi.terasic.com for more information.
  • Page 37 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Terasic P0087...

Table of Contents