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Table 2-24 Pin Assignment of UART Interface
Signal Name
HPS_UART_RX
HPS_UART_TX
USB to UART for System MAX10
The other USB to UART interface is connected with the System MAX10. It allows users
to monitor the status of the board from the host through the UART interface. As
shown in
Figure
2-29, the board provides several sensors to monitor the status of the
board, such as FPGA temperature, board power monitor, and fan speed status. These
interfaces are connected to the System MAX10 FPGA on the board. The board
management logic (Dashboard) in the system MAX10 FPGA will monitor these status
and perform corresponding control according to the status. For example, when the
temperature of the FPGA increases, the system will automatically increase the fan
speed to reduce the temperature. When the temperature of the FPGA continues to
exceed the working range (such as a fan failure condition), the FPGA power will be cut
to protect the board.
See chapter 3 for details. Terasic also provide a "board information IP" that allow user
can place it in the Agilex FPGA to read these board status. Please refer to the section
2.5 of the demonstration manual.
Figure 2-29 Block diagram of the system status interface
MA27
User Manual
FPGA Pin No.
PIN_L15
PIN_BF26
79
Description
HPS UART Receiver
HPS UART Transmitter
I/O Standard
1.8V
1.8V
www.terasic.com
February 17,
2024
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