Terasic DE0-Nano-SoC Manuals

Manuals and User Guides for Terasic DE0-Nano-SoC. We have 4 Terasic DE0-Nano-SoC manuals available for free PDF download: Design Manual, User Manual, Getting Started Manual

Terasic DE0-Nano-SoC Design Manual (100 pages)

Brand: Terasic | Category: Computer Hardware | Size: 4 MB

Table of Contents
2
List of Figures
6
Table of Tables
9
Prerequisites
10
Hardware
10
Software
10
Software Versions Used in this Guide
10
Licenses
10
Introduction
12
Terasic DE0-Nano-Soc Board
13
Specifications
13
FPGA Device
13
Configuration and Debug
13
Memory Device
13
Communication
13
Connectors
13
Switches, Buttons and Indicators
13
Sensors
14
Power
14
Block Diagram
14
Layout
15
Cyclone V Overview
16
Introduction to the Cyclone V Hard Processor System
16
Features of the HPS
18
System Integration Overview
19
MPU Subsystem
19
SDRAM Controller Subsystem
19
Support Peripherals
19
System Manager
19
FPGA Manager
19
Interface Peripherals
20
GPIO Interfaces
20
On-Chip Memory
20
On-Chip RAM
20
Boot ROM
20
HPS-FPGA Interfaces
20
HPS Address Map
20
HPS Address Spaces
20
HPS Peripheral Region Address Map
22
HPS Booting and FPGA Configuration
24
HPS Boot and FPGA Configuration Ordering
24
Zooming in on the HPS Boot Process
26
Preloader
27
Using the Cyclonev - General Information
28
Introduction
28
FPGA-Only
28
Hps & Fpga
28
Bare-Metal Application
28
Application over an Operating System (Linux)
29
Goals
29
Project Structure
29
Using the Cyclone V - Hardware
31
General Quartus Prime Setup
31
System Design with Qsys - Nios II
31
System Design with Qsys - HPS
32
Instantiating the HPS Component
33
FPGA Interfaces Tab
33
Peripheral Pins Tab
33
Theory
33
Configuration
34
HPS Clocks Tab
36
SDRAM Tab
36
Interfacing with FPGA Peripherals
38
Generating the Qsys System
39
Instantiating the Qsys System
40
HPS DDR3 Pin Assignments
42
Wiring the DE0-Nano-Soc
43
Programming the FPGA
44
Creating Target Sdcard Artifacts
45
Using the Cyclone V - FPGA - Nios II - Bare-Metal
46
Project Setup
46
Nios II Programming Theory - Accessing Peripherals
46
Nios II Programming Practice
47
Using the Cylone V - HPS - ARM - General
49
Partitioning the Sdcard
49
Generating a Header File for HPS Peripherals
49
HPS Programming Theory
50
Using the Cyclone V - HPS - ARM - Bare-Metal
52
Preloader
52
Preloader Generation
52
Creating Target Sdcard Artifacts
53
Arm Ds-5
53
Setting up a New C Project
54
Writing a DS-5 Debug Script
55
Setting up the Debug Configuration
56
Bare-Metal Programming
57
Accessing FPGA Peripherals
58
Accessing HPS Peripherals
58
Using Altera's HWLIB - Prerequisites
59
Global Timer & Clock Manager
59
Gpio
60
Launching the Bare-Metal Code in the Debugger
61
Bare-Metal Debugger Tour
62
Registers" View [UNAVAILABLE in Soc EDS 16.0]
62
App Console
63
Using the Cyclone V - HPS - ARM - Linux
64
Preloader
64
Preloader Generation
64
Creating Target Sdcard Artifacts
65
Bootloader
65
Getting & Compiling U-Boot
65
Scripting U-Boot
67
Creating Target Sdcard Artifacts
68
Linux Kernel
68
Getting & Compiling Linux
68
Creating Target Sdcard Artifacts
69
Ubuntu Core Root Filesystem
69
Obtaining Ubuntu Core
70
Customizing Ubuntu Core
70
System Configuration on First Boot
70
Post-Install Configuration Script
72
Creating Target Sdcard Artifacts
73
Writing Everything to the Sdcard
73
Scripting the Complete Procedure
74
Testing the Setup
75
Arm Ds-5
85
Setting up a New C Project
85
Creating a Remote Debug Connection to the Linux Distribution
86
Find the Linux Distribution's IP Address
86
Create an SSH Remote Connection
88
Setting up the Debug Configuration
89
Linux Programming
90
Using Altera's HWLIB - Prerequisites
92
Accessing Hardware Peripherals from User Space
92
Opening the Physical Memory File Descriptor
92
Accessing HPS Peripherals
93
Accessing FPGA Peripherals
94
Cleaning up before Application Exit
95
Launching the Linux Code in the Debugger
95
App Console
96
Linux Debugger Restrictions
97
Todo
98
References
99

Terasic DE0-Nano-SoC User Manual (80 pages)

Brand: Terasic | Category: Microcontrollers | Size: 6 MB

Table of Contents
2
Chapter 1 DE0-Nano-Soc Development Kit

5
- DE0-Nano-Soc System CD
  6
- Package Contents
  6
- Getting Help
  7
Chapter 2 Introduction of the DE0-Nano-Soc Board

8
- Layout and Components
  8
- Block Diagram of the DE0-Nano-Soc Board
  10
Chapter 3 Using the DE0-Nano-Soc Board

13
- Settings of FPGA Configuration Mode
  13
- Configuration of Cyclone V Soc FPGA on DE0-Nano-Soc
  15
- Board Status Elements
  20
- Board Reset Elements
  21
- Clock Circuitry
  22
- Peripherals Connected to the FPGA
  23
- User Push-Buttons, Switches and Leds
  24
- 2X20 GPIO Expansion Headers
  27
- Arduino uno R3 Expansion Header
  30
- A/D Converter and Analog Input
  32
- Peripherals Connected to Hard Processor System (HPS)
  34
- User Push-Buttons and Leds
  34
- Gigabit Ethernet
  34
- Uart
  36
- DDR3 Memory
  37
- Micro SD Card Socket
  39
- Usb 2.0 Otg Phy
  40
- G-Sensor
  41
- LTC Connector
  41
Chapter 4 DE0-Nano-Soc System Builder

43
- Introduction
  43
- Design Flow
  43
- Using DE0-Nano-Soc System Builder
  44
Chapter 5 Examples for FPGA

50
- DE0-Nano-Soc Factory Configuration
  50
- ADC Reading
  51
Chapter 6 Examples for HPS Soc

54
- Hello Program
  54
- Users LED and KEY
  56
- I2C Interfaced G-Sensor
  62
Chapter 7 Examples for Using both HPS Soc and FGPA

66
- HPS Control FPGA LED
  66
Chapter 8 Programming the EPCS Device

70
Chapter 9

79
- Chapter 9 Appendix A
  79
Chapter 10 Appendix B

80

Terasic DE0-Nano-SoC User Manual (50 pages)

Brand: Terasic | Category: Motherboard | Size: 4 MB

Table of Contents
2
Chapter 1 Introduction

3
- Design Flow
  3
- Before You Begin
  4
- What You will Learn
  8
Chapter 2 Assign the Device

9
Chapter 3 Design Entry

13
- Add a PLL Megafunction
  13
- Add a Multiplexer
  28
- Assign the Pins
  35
- Create a Default Timequest SDC File
  37
Chapter 4 Compile and Verify Your Design

39
- Compile Your Design
  39
- Program the FPGA Device
  41
- Verify the Hardware
  47
Chapter 5 Appendix

50
- Headquarter & Branches
  50

Terasic DE0-Nano-SoC Getting Started Manual (26 pages)

Brand: Terasic | Category: Motherboard | Size: 2 MB

Table of Contents
2
Chapter 1 About this Guide

4
Chapter 2 Software Installation

5
Chapter 3 Development Board Setup

12
- Introduction
  12
- Default Msel Settings
  12
- Usb and Power Cables
  13
- Powering up the De0-Nano -S O C Board
  13
Chapter 4 Performing a Fpga System Test

14
Chapter 5 Running Linux on the De0-Nano-Soc Board

20
- Introduction
  20
- Creating a Micro Sd Card Image
  20
- Running Linux on the De0-Nano-Soc Board
  20
  - Setting U Puart Terminal
    21
  - Uuart T
    21
  - Running Linux on De0-Nano -S O Cboard
    24
- Additional Information
  26

Terasic Categories

Motherboard Microcontrollers Computer Hardware Robotics Touch Panel

More Terasic Manuals

Terasic DE0-Nano-SoC Manuals

Terasic DE0-Nano-SoC Design Manual (100 pages)

Table of Contents

Terasic DE0-Nano-SoC User Manual (80 pages)

Table of Contents

Chapter 1 DE0-Nano-Soc Development Kit

Chapter 2 Introduction of the DE0-Nano-Soc Board

Chapter 3 Using the DE0-Nano-Soc Board

Chapter 4 DE0-Nano-Soc System Builder

Chapter 5 Examples for FPGA

Chapter 6 Examples for HPS Soc

Chapter 7 Examples for Using both HPS Soc and FGPA

Chapter 8 Programming the EPCS Device

Chapter 9

Chapter 10 Appendix B

Terasic DE0-Nano-SoC User Manual (50 pages)

Table of Contents

Chapter 1 Introduction

Chapter 2 Assign the Device

Chapter 3 Design Entry

Chapter 4 Compile and Verify Your Design

Chapter 5 Appendix

Terasic DE0-Nano-SoC Getting Started Manual (26 pages)

Table of Contents

Chapter 1 About this Guide

Chapter 2 Software Installation

Chapter 3 Development Board Setup

Chapter 4 Performing a Fpga System Test

Chapter 5 Running Linux on the De0-Nano-Soc Board

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