Usb To Uart - Terasic Mercury A2700 User Manual

CXL_RX_n[0]
CXL_RX_n[1]
CXL_RX_n[2]
CXL_RX_n[3]
CXL_RX_n[4]
CXL_RX_n[5]
CXL_RX_n[6]
CXL_RX_n[7]
CXL_RX_n[8]
CXL_RX_n[9]
CXL_RX_n[10]
CXL_RX_n[11]
CXL_RX_n[12]
CXL_RX_n[13]
CXL_RX_n[14]
CXL_RX_n[15]
CXL_REFCLK_15A_p[0]
CXL_REFCLK_15A_p[1]
CXL_PERST_n
CXL_RST_n
CXL_SMB_ALERT_n

2.11 USB to UART

The board provides two UART functions (See
to HPS fabric in the Agilex FPGA, allowing host to communicate and debug with the
MA27
User Manual
PIN_FG10 CXL receive bus
PIN_FT3 CXL receive bus
PIN_FW10 CXL receive bus
PIN_GJ3 CXL receive bus
PIN_GM10 CXL receive bus
PIN_HA3 CXL receive bus
PIN_HD10 CXL receive bus
PIN_HN3 CXL receive bus
PIN_HT10 CXL receive bus
PIN_JF3 CXL receive bus
PIN_JJ10 CXL receive bus
PIN_JV3 CXL receive bus
PIN_KA10 CXL receive bus
PIN_KK3 CXL receive bus
PIN_KN10 CXL receive bus
PIN_LC3 CXL receive bus
PIN_GA27 Clock for RootPort mode
PIN_GY26 Clock for RootPort mode
PIN_HY33 PCIe interface reset
PIN_J51
PIN_KF30 an interrupt line for devices
that want to trade their ability
77
CXL bus reset
to master for
Figure 2-27). One of them is connected
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
High Speed Differential I/O
HCSL
HCSL
1.2 V
1.2 V
1.2 V
www.terasic.com
February 17,
2024