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DDR4D_ODT[0]
DDR4D_ODT[1]
DDR4D_PAR
DDR4D_ALERT_n
DDR4D_ACT_n
DDR4D_EVENT_n
DDR4D_C[0]
DDR4D_C[1]
DDR4D_RZQ
2.8
QSPF-DD Ports
The board can support two standard QSFP-DD (Quad Small Form Factor Pluggable
Double Density) optical modules. The two QSFP-DD ports on the board support
different speeds. The QSFP-DD A port only supports 8 pairs of 25Gbps NRZ
modulation or 4 pairs of 50Gbps PAM4. The QSFP-DD B port supports 8 pairs of
25Gbps NRZ modulation or 8 pairs 50Gbps PAM4 and can support 400G ethernet.
Furthermore, the QSFP-DD modules also can backward compatible with QSFP28 and
QSFP+ optical transceivers.
QSFP-DD and Agilex FPGA.
MA27
User Manual
On Die
Termination
On Die
Termination
Command and
Address Parity
Input
Register ALERT_n
output
Activation
Command Input
Chip Temperature
Event
Chip ID
Chip ID
Calibrated pins for
OCT block
Figure 2-23
62
SSTL-12
SSTL-12
SSTL-12
1.2 V
SSTL-12
1.2 V
SSTL-12
SSTL-12
1.2 V
shows the connections between the
PIN_LH46
PIN_LL47
PIN_LB48
PIN_MA48
PIN_KW45
PIN_KJ61
PIN_MA50
PIN_LW49
PIN_LN44
www.terasic.com
February 17,
2024
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