Table 2-6:
2.4
Product Specifications
System On-Chip
CHAPTER
•
2
WR-Z16 User Manual Rev. v5.0
Ports LED behavior
Visual
SoC: Xilinx Zynq 7000 series
CPU: Dual ARM® A9 MP@ 1 GHz
ID
Behavior
0
wr0
▲
B
Master / Dis-
abled
▲
Active slave
▲
Passive slave
▲
D
Link down
▲
Link up
▲
Activity
1
wr1
▼
A
Link down
▼
Link up
▼
Activity
▼
C
Master / Dis-
abled
▼
Active slave
▼
Passive slave
2.4 Product Specifications
Description
wr0 corresponds to upper
SFP in the stack
Led B is disabled if this port is
providing timing to other equip-
ment (master mode) or disabled
Led B is green when port is the
active slave that discipline the
device
Led B is orange when port is in
passive/monitoring mode (§5.1)
When link is down led D is dis-
abled
When link is up the led D stays in
green
Blinks in orange each time a
packet is received on this port
wr1 corresponds to lower
SFP in the stack
When link is down led A is dis-
abled
When link is up the led A stays in
green
Blinks in orange each time a
packet is received on this port
Led C is disabled if this port is
providing timing to other equip-
ment (master mode) or disabled
Led C is green when port is the
active slave that discipline the
device
Led C is orange when port is in
passive/monitoring mode
13