Lcd32B Control Register; Lcd32B Timing Control Register 1 - Epson S1C31W74 Technical Manual

Cmos 32-bit single chip microcontroller
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LCD32BCLK.
CLKDIV[2:0] bits
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
(Note) The oscillation circuits/external input that are not supported in this IC cannot be
selected as the clock source.
Note: The LCD32BCLK register settings can be altered only when the LCD32BCTL.MODEN bit = 0.

LCD32B Control Register

Register name
Bit
LCD32BCTL
15–8 –
7–2 –
1
0
Bits 15–2 Reserved
Bit 1
LCDDIS
This bit enables the SEG/COM-pin discharge operations when "Display off" is selected.
1 (R/W): Enable SEG/COM-pin discharge operations
0 (R/W): Disable SEG/COM-pin discharge operations
Setting this bit to 1 configures the SEG/COM pins to output a low level when "Display off" is select-
ed. Setting to 0 configures the SEG/COM pins to enter Hi-Z status when "Display off" is selected.
Bit 0
MODEN
This bit enables the LCD32B operations.
1 (R/W): Enable LCD32B operations
0 (R/W): Disable LCD32B operations
Setting this bit to 1 starts supplying the operating clock to LCD32B and the SEG/COM pins are con-
figured to output a low level. Setting this bit to 0 stops the operating clock and the SEG/COM pins are
put into Hi-Z status.
Note: If the LCD32BCTL.MODEN bit is altered from 1 to 0 while the LCD panel is displaying, the
LCD display is automatically turned off and the LCD32BDSP.DSPC[1:0] bits are also set to
0x0.

LCD32B Timing Control Register 1

Register name
Bit
LCD32BTIM1
15–13 –
12–8 FRMCNT[4:0]
7–5 –
4–0 LDUTY[4:0]
Bits 15–13 Reserved
Bits 12–8 FRMCNT[4:0]
These bits set the frame frequency. For more information, refer to "Frame Frequency."
Bits 7–5
Reserved
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)
Table 20.8.1 Clock Source and Division Ratio Settings
0x0
IOSC
Reserved
1/512
1/256
1/128
1/64
1/32
1/16
Bit name
Initial
0x00
0x00
LCDDIS
0
MODEN
0
Bit name
Initial
0x0
0x01
0x0
0x1f
Seiko Epson Corporation
LCD32BCLK.CLKSRC[1:0] bits
0x1
0x2
OSC1
OSC3
1/1
Reserved
1/512
1/256
1/128
1/64
1/32
1/16
Reset
R/W
R
R
H0
R/W
H0
R/W
Reset
R/W
R
H0
R/W
R
H0
R/W
20 LCD DRIVER (LCD32B)
0x3
EXOSC
1/1
Remarks
Remarks
20-27

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