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7 I/O PORTS (PPORT)
7.7.8 P7 Port Group
The P7 port group supports the GPIO and interrupt functions.
Register name
Bit
PPORTP7DAT
15–8 P7OUT[7:0]
(P7 Port Data
7–0 P7IN[7:0]
Register)
PPORTP7IOEN
15–8 P7IEN[7:0]
(P7 Port Enable
7–0 P7OEN[7:0]
Register)
PPORTP7RCTL
15–8 P7PDPU[7:0]
(P7 Port Pull-up/down
7–0 P7REN[7:0]
Control Register)
PPORTP7INTF
15–8 –
(P7 Port Interrupt
7–0 P7IF[7:0]
Flag Register)
PPORTP7INTCTL
15–8 P7EDGE[7:0]
(P7 Port Interrupt
7–0 P7IE[7:0]
Control Register)
PPORTP7CHATEN
15–8 –
(P7 Port Chattering
Filter Enable
7–0 P7CHATEN[7:0]
Register)
PPORTP7MODSEL
15–8 –
(P7 Port Mode Select
7–0 P7SEL[7:0]
Register)
PPORTP7FNCSEL
15–14 P77MUX[1:0]
(P7 Port Function
13–12 P76MUX[1:0]
Select Register)
11–10 P75MUX[1:0]
9–8 P74MUX[1:0]
7–6 P73MUX[1:0]
5–4 P72MUX[1:0]
3–2 P71MUX[1:0]
1–0 P70MUX[1:0]
P7SELy = 0
Port
name
GPIO
Peripheral
P70
P70
P71
P71
P72
P72
P73
P73
P74
P74
P75
P75
P76
P76
P77
P77
7-18
Table 7.7.8.1 Control Registers for P7 Port Group
Bit name
Initial
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x3
0x3
0x3
0x3
0x3
0x3
0x3
0x3
Table 7.7.8.2 P7 Port Group Function Assignment
P7yMUX = 0x0
P7yMUX = 0x1
(Function 0)
(Function 1)
Pin
Peripheral
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Seiko Epson Corporation
Reset
R/W
H0
R/W
–
H0
R
H0
R/W
–
H0
R/W
H0
R/W
–
H0
R/W
–
R
–
H0
R/W
Cleared by writing 1.
H0
R/W
–
H0
R/W
–
R
–
H0
R/W
–
R
–
H0
R/W
H0
R
–
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
H0
R
P7SELy = 1
P7yMUX = 0x2
(Function 2)
Pin
Peripheral
Pin
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
S1C31W74 TECHNICAL MANUAL
Remarks
P7yMUX = 0x3
(Function 3)
Peripheral
Pin
LCD32B
SEG9
LCD32B
SEG8
LCD32B
SEG7
LCD32B
SEG6
LCD32B
SEG5
LCD32B
SEG4
LCD32B
SEG3
LCD32B
SEG2
(Rev. 1.1)
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