Epson S1C31W74 Technical Manual page 35

2 POWER SUPPLY, RESET, AND CLOCKS
Oscillation start procedure for the IOSC oscillator circuit
Follow the procedure shown below to start oscillation of the IOSC oscillator circuit.
1. Write 1 to the CLGINTF.IOSCSTAIF bit.
2. Write 1 to the CLGINTE.IOSCSTAIE bit.
3. Write 0x0096 to the SYSPROT.PROT[15:0] bits. (Remove system protection)
4. Configure the CLGIOSC.IOSCFQ[2:0] bits.
5. Write a value other than 0x0096 to the SYSPROT.PROT[15:0] bits. (Set system protection)
6. Write 1 to the CLGOSC.IOSCEN bit.
7. IOSCCLK can be used if the CLGINTF.IOSCSTAIF bit = 1 after an interrupt occurs.
Oscillation start procedure for the OSC1 oscillator circuit
Follow the procedure shown below to start oscillation of the OSC1 oscillator circuit.
1. Write 1 to the CLGINTF.OSC1STAIF bit.
2. Write 1 to the CLGINTE.OSC1STAIE bit.
3. Write 0x0096 to the SYSPROT.PROT[15:0] bits. (Remove system protection)
4. Configure the following CLGOSC1 register bits according to the resonator used:
- CLGOSC1.INV1N[1:0] bits
- CLGOSC1.CGI1[2:0] bits
- CLGOSC1.OSC1WT[1:0] bits
In addition to the above, configure the following bits when using the oscillation startup control circuit (see
Figure 2.3.4.2):
- CLGOSC1.INV1B[1:0] bits
- Set the CLGOSC1.OSC1BUP bit to 1.
5. Write a value other than 0x0096 to the SYSPROT.PROT[15:0] bits. (Set system protection)
6. Write 1 to the CLGOSC.OSC1EN bit.
7. OSC1CLK can be used if the CLGINTF.OSC1STAIF bit = 1 after an interrupt occurs.
The setting values of the CLGOSC1.INV1N[1:0], CLGOSC1.CGI1[2:0], CLGOSC1.OSC1WT[1:0], and
CLGOSC1.INV1B[1:0] bits should be determined after performing evaluation using the populated circuit board.
Oscillation start procedure for the OSC3 oscillator circuit
Follow the procedure shown below to start oscillation of the OSC3 oscillator circuit.
1. Write 1 to the CLGINTF.OSC3STAIF bit.
2. Write 1 to the CLGINTE.OSC3STAIE bit.
3. Write 0x0096 to the SYSPROT.PROT[15:0] bits. (Remove system protection)
4. Configure the following CLGOSC3 register bits.
- CLGOSC3.OSC3WT[2:0] bits
- CLGOSC3.OSC3INV[1:0] bits
5. Write a value other than 0x0096 to the SYSPROT.PROT[15:0] bits. (Set system protection)
6. Assign the OSC3 oscillator input/output functions to the ports. (Refer to the "I/O Ports" chapter.)
7. Write 1 to the CLGOSC.OSC3EN bit.
8. OSC3CLK can be used if the CLGINTF.OSC3STAIF bit = 1 after an interrupt occurs.
The setting values of the CLGOSC3.OSC3INV[1:0] and CLGOSC3.OSC3WT[2:0] bits should be determined
after performing evaluation using the populated circuit board.
System clock switching
The CPU boots using IOSCCLK as SYSCLK. After booting, the clock source of SYSCLK can be switched ac-
cording to the processing speed required. The SYSCLK frequency can also be set by selecting the clock source
division ratio, this makes it possible to run the CPU at the most suitable performance for the process to be ex-
ecuted. The CLGSCLK.CLKSRC[1:0] and CLGSCLK.CLKDIV[1:0] bits are used for this control.
The CLGSCLK register bits are protected against writings by the system protect function, therefore, the system protec-
tion must be removed by writing 0x0096 to the SYSPROT.PROT[15:0] bits before the register setting can be altered.
For the transition between the operating modes including the system clock switching, refer to "Operating Mode."
2-10
(Clear interrupt flag)
(Enable interrupt)
(Select frequency)
(Start oscillation)
(Clear interrupt flag)
(Enable interrupt)
(Set oscillation inverter gain)
(Set internal gate capacitor)
(Set oscillation stabilization waiting time)
(Set oscillation inverter gain for startup boosting period)
(Enable oscillation startup control circuit)
(Start oscillation)
(Clear interrupt flag)
(Enable interrupt)
(Set oscillation stabilization waiting time)
(Set oscillation inverter gain)
(Start oscillation)
Seiko Epson Corporation
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)