Receive Errors; Framing Error - Epson S1C31W74 Technical Manual

Cmos 32-bit single chip microcontroller
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13 UART (UART2)
S1C31 UART2
Figure 13.5.4.1 Example of Connections with an Infrared Communication Module
The transmit data output from the UART2 Ch.n transmit shift register is output from the USOUTn pin after the low
pulse width is converted into 3/16 by the RZI modulator in SIR method.
Modulator input (shift register output)
Modulator output (USOUTn)
The received IrDA signal is input to the RZI demodulator and the low pulse width is converted into the normal
width before input to the receive shift register.
Demodulator input (USINn)
Demodulator output (shift register input)
Notes: • Set the baud rate division ratio to 1/16 when using the IrDA interface function.
• The low pulse width (T

13.6 Receive Errors

Three different receive errors, framing error, parity error, and overrun error, may be detected while receiving data.
Since receive errors are interrupt causes, they can be processed by generating interrupts.

13.6.1 Framing Error

The UART2 determines loss of sync if a stop bit is not detected (when the stop bit is received as 0) and assumes
that a framing error has occurred. The received data that encountered an error is still transferred to the receive data
buffer and the UART2_nINTF.FEIF bit (framing error interrupt flag) is set to 1 when the data becomes ready to
read from the UART2_nRXD register.
Note: Framing error/parity error interrupt flag set timings
These interrupt flags will be set after the data that encountered an error is transferred to the re-
ceive data buffer. Note, however, that the set timing depends on the buffer status at that point.
• When the receive data buffer is empty
The interrupt flag will be set when the data that encountered an error is transferred to the re-
ceive data buffer.
• When the receive data buffer has a one-byte free space
The interrupt flag will be set when the first data byte already loaded is read out after the data
that encountered an error is transferred to the second byte entry of the receive data buffer.
13-8
RXD
USINn
VCC
V
DD
GND
V
SS
TXD
USOUTn
LEDA
T
Figure 13.5.4.2 IrDA Transmission Signal Waveform
T
2
Figure 13.5.4.3 IrDA Receive Signal Waveform
) of the IrDA signal input must be CLK_UART2_n × 3 cycles or longer.
2
Seiko Epson Corporation
VCC
AMP
GND
Infrared communication module
1
3
T
1
16
3
T
1
16
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)

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