Epson S1C31W74 Technical Manual page 11

I2C Ch.n Receive Data Register .............................................................................................. 16-21
I2C Ch.n Status and Interrupt Flag Register ........................................................................... 16-22
I2C Ch.n Interrupt Enable Register ......................................................................................... 16-23
I2C Ch.n Transmit Buffer Empty DMA Request Enable Register ............................................ 16-24
I2C Ch.n Receive Buffer Full DMA Request Enable Register .................................................. 16-24
17 16-bit PWM Timers (T16B) ........................................................................................17-1
17.1 Overview ...................................................................................................................... 17-1
17.2 Input/Output Pins ......................................................................................................... 17-2
17.3 Clock Settings .............................................................................................................. 17-3
17.3.1 T16B Operating Clock ................................................................................... 17-3
17.3.2 Clock Supply in SLEEP Mode ....................................................................... 17-3
17.3.3 Clock Supply During Debugging ................................................................... 17-3
17.3.4 Event Counter Clock ...................................................................................... 17-3
17.4 Operations ................................................................................................................... 17-4
17.4.1 Initialization .................................................................................................... 17-4
17.4.2 Counter Block Operations ............................................................................. 17-5
17.4.3 Comparator/Capture Block Operations ......................................................... 17-8
17.4.4 TOUT Output Control ................................................................................... 17-17
17.5 Interrupt ....................................................................................................................... 17-23
17.6 DMA Transfer Requests .............................................................................................. 17-23
17.7 Control Registers ........................................................................................................ 17-23
T16B Ch.n Clock Control Register .......................................................................................... 17-23
T16B Ch.n Counter Control Register ...................................................................................... 17-24
T16B Ch.n Max Counter Data Register ................................................................................... 17-25
T16B Ch.n Timer Counter Data Register................................................................................. 17-25
T16B Ch.n Counter Status Register ........................................................................................ 17-26
T16B Ch.n Interrupt Flag Register........................................................................................... 17-27
T16B Ch.n Interrupt Enable Register ...................................................................................... 17-28
T16B Ch.n Comparator/Capture m Control Register .............................................................. 17-29
T16B Ch.n Compare/Capture m Data Register ....................................................................... 17-31
T16B Ch.n Counter Max/Zero DMA Request Enable Register ............................................... 17-32
T16B Ch.n Compare/Capture m DMA Request Enable Register ............................................ 17-32
18 Sound Generator (SNDA) ..........................................................................................18-1
18.1 Overview ...................................................................................................................... 18-1
18.2 Output Pins and External Connections ........................................................................ 18-2
18.2.1 List of Output Pins ......................................................................................... 18-2
18.2.2 Output Pin Drive Mode .................................................................................. 18-2
18.2.3 External Connections .................................................................................... 18-2
18.3 Clock Settings .............................................................................................................. 18-3
18.3.1 SNDA Operating Clock .................................................................................. 18-3
18.3.2 Clock Supply in SLEEP Mode ....................................................................... 18-3
18.3.3 Clock Supply in DEBUG Mode ...................................................................... 18-3
18.4 Operations ................................................................................................................... 18-3
18.4.1 Initialization .................................................................................................... 18-3
18.4.2 Buzzer Output in Normal Buzzer Mode ......................................................... 18-3
18.4.3 Buzzer Output in One-shot Buzzer Mode...................................................... 18-6
18.4.4 Output in Melody Mode ................................................................................. 18-7
18.5 Interrupts ...................................................................................................................... 18-9
18.6 DMA Transfer Requests .............................................................................................. 18-10
18.7 Control Registers ........................................................................................................ 18-10
SNDA Clock Control Register ................................................................................................. 18-10
SNDA Select Register ............................................................................................................. 18-11
SNDA Control Register ............................................................................................................ 18-12
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)
Seiko Epson Corporation
CONTENTS
ix