Rtca Interrupt Enable Register - Epson S1C31W74 Technical Manual

Cmos 32-bit single chip microcontroller
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Bit 8
ALARMIF
Bit 7
T1DAYIF
Bit 6
T1HURIF
Bit 5
T1MINIF
Bit 4
T1SECIF
Bit 3
T1_2SECIF
Bit 2
T1_4SECIF
Bit 1
T1_8SECIF
Bit 0
T1_32SECIF
These bits indicate the real-time clock interrupt cause occurrence status.
1 (R):
Cause of interrupt occurred
0 (R):
No cause of interrupt occurred
1 (W):
Clear flag
0 (W):
Ineffective
The following shows the correspondence between the bit and interrupt:
RTCAINTF. ALARMIF bit: Alarm interrupt
RTCAINTF.T1DAYIF bit:
RTCAINTF.T1HURIF bit:
RTCAINTF.T1MINIF bit:
RTCAINTF.T1SECIF bit:
RTCAINTF.T1_2SECIF bit: 1/2-second interrupt
RTCAINTF.T1_4SECIF bit: 1/4-second interrupt
RTCAINTF.T1_8SECIF bit: 1/8-second interrupt
RTCAINTF.T1_32SECIF bit: 1/32-second interrupt

RTCA Interrupt Enable Register

Register name
Bit
RTCAINTE
15
14
13
12
11–9 –
8
7
6
5
4
3
2
1
0
Bit 15
RTCTRMIE
Bit 14
SW1IE
Bit 13
SW10IE
Bit 12
SW100IE
These bits enable real-time clock interrupts.
1 (R/W): Enable interrupts
0 (R/W): Disable interrupts
The following shows the correspondence between the bit and interrupt:
RTCAINTE.RTCTRMIE bit: Theoretical regulation completion interrupt
RTCAINTE.SW1IE bit:
RTCAINTE.SW10IE bit:
RTCAINTE.SW100IE bit:
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)
1-day interrupt
1-hour interrupt
1-minute interrupt
1-second interrupt
Bit name
Initial
RTCTRMIE
0
SW1IE
0
SW10IE
0
SW100IE
0
0x0
ALARMIE
0
T1DAYIE
0
T1HURIE
0
T1MINIE
0
T1SECIE
0
T1_2SECIE
0
T1_4SECIE
0
T1_8SECIE
0
T1_32SECIE
0
Stopwatch 1 Hz interrupt
Stopwatch 10 Hz interrupt
Stopwatch 100 Hz interrupt
Seiko Epson Corporation
10 REAL-TIME CLOCK (RTCA)
Reset
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
Remarks
10-13

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