22 USB 2.0 FS DEVICE CONTROLLER (USB, USBMISC)
CPU interface (user bus interface and peripheral bus interface)
Controls timings of the CPU interface and enables register access.
Notes: • The USB controller hardware provides endpoints and manages transactions. However, it
does not provide a management function in the interface defined for USB (hereinafter re-
ferred to as USB-defined interface). The USB-defined interface should be implemented in the
firmware. According to the device-specific descriptor definition, set endpoints as required
and configure the USB-defined interface using an appropriate endpoint combination.
• This chapter use a general name as shown below to describe the endpoints and the control
registers/bits with the same function that are provided for each endpoint.
EPn: Refers to all endpoints (EP0, EPa, EPb, and EPc), and it is also used for their registers/
bits with the same function.
Example: USBEPnCFG.DIR bit
EPm: Refers to general-purpose endpoints (EPa, EPb, and EPc), and it is also used for their
registers/bits with the same function.
Example: USBEPmCTL.TGLSTAT bit
22.2 Input/Output Pins and External Connections
22.2.1 List of Input/Output Pins
Table 22.2.1.1 lists the USB controller pins.
Pin name
USB_DP
USB_DM
V
BUS
USB18VOUT
USB33VOUT
USB_XI
USB_XO
VBUS_MON
*2
*1 Indicates the status when the pin is configured for the USB controller.
*2 The software should configure the VBUS_MON pin to a general-purpose input port when detecting V
tion, or to the EXSVD1 input of the supply voltage detector when detecting V
If the port is shared with the USB controller pin and other functions, the USB input/output function must be as-
signed to the port before activating the USB controller. For more information, refer to the "I/O Ports" chapter.
22.2.2 External Connections
Figure 22.2.2.1 shows a connection diagram between the USB controller pins of this IC and an external USB de-
vice. The USB_DP pin has a built-in pull up resistor that can be enabled/disabled via software.
22-2
(= USBEP0CFG.DIR, USBEPACFG.DIR, USBEPBCFG.DIR, or USBEPCCFG.DIR bit)
(= USBEPACTL.TGLSTAT, USBEPBCTL.TGLSTAT, or USBEPCCTL.TGLSTAT bit)
USBRWFIFOSEL.EPmRD bit
(= USBRWFIFOSEL.EPARD, USBRWFIFOSEL.EPBRD, or USBRWFIFOSEL.EPCRD bit)
Table 22.2.1.1 List of USB Controller Pins
I/O*
Initial status
I/O
I
I/O
I
P
–
P
–
P
–
A
–
A
–
I
I
Seiko Epson Corporation
*1
USB D+ signal input/output
USB D- signal input/output
USB V
input (5 V can be applied.)
BUS
USB 1.8 V regulator output
USB 3.3 V regulator output
USBOSC oscillator circuit input
USBOSC oscillator circuit output
V
detection input
BUS
BUS
Function
connec-
BUS
voltage drop or disconnection.
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)