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4.6.1 System-Protect Function
The system-protect function protects control registers and bits from writings. They cannot be rewritten unless write
protection is removed by writing 0x0096 to the MSCPROT.PROT[15:0] bits. This function is provided to prevent
deadlock that may occur when a system-related register is altered by a runaway CPU. See "Control Registers" in
each peripheral circuit to identify the registers and bits with write protection.
Note: Once write protection is removed using the MSCPROT.PROT[15:0] bits, write enabled status is
maintained until write protection is applied again. After the registers/bits required have been al-
tered, apply write protection.
4.7 Control Registers
MISC System Protect Register
Register name
Bit
MSCPROT
15–0 PROT[15:0]
Bits 15–0 PROT[15:0]
These bits protect the control registers related to the system against writings.
0x0096 (R/W):
Other than 0x0096 (R/W): Enable system protection
While the system protection is enabled, any data will not be written to the affected control bits (bits
with "WP" or "R/WP" appearing in the R/W column).
MISC IRAM Size Register
Register name
Bit
MSCIRAMSZ
15–9 –
8
7–3 –
2–0 IRAMSZ[2:0]
Bits 15–3 Reserved
Bits 2–0
IRAMSZ[2:0]
These bits set the internal RAM size that can be used.
FLASHC Flash Read Cycle Register
Register name
Bit
FLASHCWAIT
15–9 –
8
7–2 –
1–0 RDWAIT[1:0]
Bits 15–2 Reserved
Bits 1–0
RDWAIT[1:0]
These bits set the number of bus access cycles for reading from the Flash memory.
S1C17W18 TECHNICAL MANUAL
(Rev. 1.2)
Bit name
Initial
0x0000
Disable system protection
Bit name
Initial
0x00
(reserved)
0x08
0x4
Table 4.7.1 Internal RAM Size Selections
MSCIRAMSZ.IRAMSZ[2:0] bits
0x7–0x5
0x4
0x3
0x2
0x1
0x0
Bit name
Initial
0x00
(reserved)
0x00
0x1
Seiko Epson Corporation
Reset
R/W
H0
R/W
–
Reset
R/W
–
R
–
0
H0
R/WP Always set to 0.
–
R
–
H0
R/WP
Internal RAM size
Reserved
8KB
4KB
2KB
1KB
512B
Reset
R/W
–
R
–
0
H0
R/WP Always set to 0.
–
–
R
H0
R/WP
4 MEMORY AND BUS
Remarks
Remarks
Remarks
4-9
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