Lcd32B Timing Control Register 2; Lcd32B Power Control Register - Epson S1C31W74 Technical Manual

20 LCD DRIVER (LCD32B)
Bits 4–0 LDUTY[4:0]
These bits set the drive duty. For more information, refer to "Drive Duty Switching."

LCD32B Timing Control Register 2

Register name Bit
LCD32BTIM2 15–10 –
9–8 BSTC[1:0]
7–5 –
4–0 NLINE[4:0]
Bits 15–10 Reserved
Bits 9–8 BSTC[1:0]
These bits select the booster clock frequency for the LCD voltage booster.
f
CLK_LCD32B
Bits 7–5 Reserved
Bits 4–0 NLINE[4:0]
These bits enable the n-line inverse AC drive function and set the number of inverse lines. For more
information, refer to "n-Segment-Line Inverse AC Drive."

LCD32B Power Control Register

Register name Bit
LCD32BPWR 15
14–12 –
11–8 LC[3:0]
7–5 –
4
3
2
1
0
Bit 15 EXVCSEL
This bit selects the LCD drive voltage supply mode (external voltage application mode or internal
generation mode).
1 (R/W): External voltage application mode
0 (R/W): Internal generation mode
Bits 14–12 Reserved
Bits 11–8 LC[3:0]
These bits set the LCD panel contrast.
Bits 7–5 Reserved
20-28
Bit name Initial
0x00
0x1
0x0
0x00
Table 20.8.2 Booster Clock Frequency
LCD32BTIM2.BSTC[1:0] bits
0x3
0x2
0x1
0x0
: LCD32B operating clock frequency [Hz]
Bit name Initial
EXVCSEL 1
0x0
0x0
0x0
BSTEN 0
BIASSEL 0
HVLD 0
– 0
VCEN 0
Table 20.8.3 LCD Contrast Adjustment
LCD32BPWR.LC[3:0] bits
0xf
0xe
:
0x1
0x0
Seiko Epson Corporation
Reset R/W
– R –
H0 R/W
– R
H0 R/W
Booster clock frequency [Hz]
f /64
CLK_LCD32B
f /32
CLK_LCD32B
f /16
CLK_LCD32B
f /4
CLK_LCD32B
Reset R/W
H0 R/W –
– R
H0 R/W
– R
H0 R/W
H0 R/W
H0 R/W
– R
H0 R/W
Contrast
High (dark)
↑
:
↓
Low (light)
S1C31W74 TECHNICAL MANUAL
Remarks
Remarks
(Rev. 1.1)