System Reset Controller (Src); Overview; Input Pin - Epson S1C31W74 Technical Manual

2.2 System Reset Controller (SRC)

2.2.1 Overview

SRC is the system reset controller that resets the internal circuits according to the requests from the reset sources to
archive steady IC operations. The main features of SRC are outlined below.
• Embedded reset hold circuit maintains reset state to boot the system safely while the internal power supply is un-
stable after power on or the oscillation frequency is unstable after the clock source is initiated.
• Supports reset requests from multiple reset sources.
- #RESET pin
- POR and BOR
- Reset request from the CPU
- Key-entry reset
- Watchdog timer reset
- Supply voltage detector reset
- Peripheral circuit software reset (supports some peripheral circuits only)
• The CPU registers and peripheral circuit control bits will be reset with an appropriate initialization condition ac-
cording to changes in status.
Figure 2.2.1.1 shows the SRC configuration.
#RESET
Reset request from CPU
Key-entry reset
Watchdog timer reset
Supply voltage detector reset
Software reset 0
Software reset n

2.2.2 Input Pin

Table 2.2.2.1 shows the SRC pin.
Pin name
#RESET
The #RESET pin is connected to the noise filter that removes pulses not conforming to the requirements. An inter-
nal pull-up resistor is connected to the #RESET pin, so the pin can be left open. For the #RESET pin characteris-
tics, refer to "#RESET pin characteristics" in the "Electrical Characteristics" chapter.
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)
SRC
V
DD Reset request
signals
Noise filter
V
POR
SS
BOR
Figure 2.2.1.1 SRC Configuration
Table 2.2.2.1 SRC Pin
I/O Initial status
I I (Pull-up)
Seiko Epson Corporation
2 POWER SUPPLY, RESET, AND CLOCKS
Clock generator
Boot clock
IOSCCLK
Internal reset signals
(Reset group)
SYSRST_H0
Reset hold
circuit SYSRST_H1
SYSRST_S0_0
Reset
decoder SYSRST_S0_n
Reset input
To CPU and peripheral circuits
To CPU and peripheral circuits
To peripheral circuit 0
To peripheral circuit n
Function
2-3