Advantech AMAX-5000 Series User Manual page 126

Ethercat slice i/o modules
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The example below shows how to latch the counter value by an external signal at ris-
ing edge on Ch0 Z pin under Bi-Direction Mode:
Step 0: Set Rising Edge-Triggered at C0_Z_Pulse_Active_Polarity (0x8000:05)
Step 1: Enable CO0_Enable_Latch_Z (0x7000:02)
Step 2: Check CI0_Latch_Z_Valid (0x6000:02) frequently, if the bit is high, the
counter value is successfully latched by an external signal.
Step 3: Read latch values at CI0_Latch_Values (0x6000:12)
Step 4: Before next latch signal coming, the CO0_Enable_Latch_Z (0x7000:02)
should be toggled once to clear the CI0_Latch_Z_Valid (0x6000:02) status.
Step5: Once the CI0_Latch_Z_Valid (0x6000:02) bit is low, the module is ready for
the next latching signal.
Blue are 0x6000, 0x7000, 0x8000 parameters.
Red are external signals.
Note!
CI0_Latch_Values(0x6000:12) can be overwritten by both Z and L pin if
those pins are configured correctly.
AMAX-5000 Series User Manual
Figure 6.10 Latch Counter by Z pin
114

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