Simulation; Testbench Components - Intel F-Tile SDI II Agilex User Manual

2. Design Example Detailed Description
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2.4. Simulation

2.4.1. Testbench Components

Figure 20. Simplex Mode Simulation Testbench Block Diagram
Top
TX Top
Note: Refer to
connections.
Send Feedback
SDI TX Sys
F-tile PMA/
FEC Direct
SDI II
PHY IP (TX)
(TX)
SDI F-tile
PHY Adapter
Parallel Data
Serial Data
Clocking Scheme on page 22 for the Reference and System PLL Clocks IP
Video Pattern
Generator
Testbench
Control
TX Checker
RX Checker
Control/Status
®
F-Tile SDI II Intel Agilex
SDI Rx Sys
F-tile PMA/
FEC Direct
SDI II
PHY IP (RX)
(RX)
SDI F-tile
PHY Adapter
RX Top
Reference
and System
PLL Clocks IP
™
FPGA IP Design Example User Guide
27