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Signal Name
sdi_rx_eav
sdi_rx_ln
sdi_rx_ln_b
sdi_rx_crc_error_c
sdi_rx_crc_error_y
sdi_rx_crc_error_c_b
sdi_rx_crc_error_y_b
sdi_rx_line_f0
sdi_rx_line_f1
sdi_rx_vpid_byte1
sdi_rx_vpid_byte2
sdi_rx_vpid_byte3
sdi_rx_vpid_byte4
sdi_rx_vpid_checksum
_error
sdi_rx_vpid_valid
sdi_rx_vpid_byte1_b
sdi_rx_vpid_byte2_b
sdi_rx_vpid_byte3_b
sdi_rx_vpid_byte4_b
sdi_rx_vpid_checksum
_error_b
sdi_rx_vpid_valid_b
gxb_rx_serial_data
gxb_rx_serial_data_n
gxb_tx_serial_data
gxb_tx_serial_data_n
gxb_rx_ready
gxb_tx_ready
gxb_tx_reset_ack
gxb_rx_reset_ack
®
™
F-Tile SDI II Intel
Agilex
FPGA IP Design Example User Guide
34
Direction
Width
Output
N
Output
11*N
Output
11*N
Output
N
Output
N
Output
N
Output
N
Output
11*N
Output
11*N
Output
8*N
Output
8*N
Output
8*N
Output
8*N
Output
N
Output
N
Output
8*N
Output
8*N
Output
8*N
Output
8*N
Output
N
Output
N
Transceiver Interfaces
Input
1
Input
1
Output
1
Output
1
Output
1
Output
1
Output
1
Output
1
2. Design Example Detailed Description
Description
Receiver output signal that indicates current TRS is EAV.
This signal is asserted at the fourth word of TRS, which is
the XYZ word.
Received line number output from protocol
CRC error status signal from protocol
Payload ID status signal from protocol.
RX transceiver serial data
Differential pair of gxb_rx_serial_data.
TX transceiver serial data
Differential pair of gxb_tx_serial_data.
Indicates that RX transceiver is out of reset and ready for
data transfer.
Indicates that TX transceiver is out of reset and ready for
data transfer.
Indicates that TX transceiver is reset.
Indicates that RX transceiver is reset.
710496 | 2022.01.28
continued...
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