Intel F-Tile SDI II Agilex User Manual page 17

2. Design Example Detailed Description
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Figure 13. Parallel Loopback with Duplex Mode
Top
SDI RX Sys
Note: Refer to
connections.
Send Feedback
F-tile PMA/
F-tile PMA/
FEC Direct
FEC Direct
PHY IP (TX)
PHY IP (RX)
SDI F-tile
PHY Adapter
Reference
and System
PLL Clocks IP
Clocking Scheme on page 22 for the Reference and System PLL Clocks IP
Du Top
SDI II
(Duplex)
Device_init
Parallel Data
Serial Data
® ™
F-Tile SDI II Intel Agilex FPGA IP Design Example User Guide
Loopback Top
Loopback
FIFO
Control/Status
17