Digital Schematic - Mallinckrodt NELLCOR NPB-4000 Service Manual

Section 14: Main Color Board Digital Theory of Operation

14.17 DIGITAL SCHEMATIC

14-26
The control words sent to the A/D converter contain the A/D multiplexer
channel to convert, the data length, data format, and whether the conversion is a
unipolar or bipolar conversion.
The first bit transferred out the SSIO transmit line is the most significant bit, bit
15. The A/D takes bits 15-8 and the front end takes bits 7-0. Bit definitions are
as follows.
BIT 16-12:
BIT 11-10:
BIT 9:
BIT 8:
Once the A/D reads these 8 bits, a conversion starts.
BIT 7-5:
BIT 4-3:
BIT 2:
BIT 1:
BIT 0:
Once these 8 bits are strobed into the front end serial shift register, a load pulse
is generated which transfers these bits to the output register in the shift register
and these bits now become effective.
These schematics include all of the above circuits and some additional circuits
which need explanations. The schematic contains the following chips:
386EXMP
42MX09
LCD CONTROLLER 1354F0A LCD
74HCT244
74LVC16245
RTC DS1693
74LVC541
DUART
MAX211E
DISPLAY RAM
DRAM
74ACT157
BOOT FLASH
TREND FLASH
OSCILLATOR
The schematics contains the NIBP circuits, the speaker circuits, the battery
voltage and temperature input circuits, the push button interface circuit, and the
backlight interface connector circuit. The 50 pin connector connects to the
recorder, RS-232 connector, the power supply connector, the DEFIB connector,
and the speaker.
A/D MUX CHANNEL SELECT
A/D DATA LENGTH
A/D DATA FORMAT
UNIPOLAR/BIPOLAR
FRONT END MUX CHANNEL SELECT
LEAD SELECT
0.5 HZ FILTER SELECT
BASELINE RESET
PARITY
microcontroller
programmable device with the control
circuits
buffer chips for the signals from the
LCD controller to the display itself
data bus buffer to interface the 386EX
to the other chips
real time clock with 64 bytes of battery
backed ram and on board crystal
mux for the address/data to the RTC
dual uart for the RS232 and recorder
RS232 interface chip with 15kv ESD
1MX16 EDO DRAM for the LCD
display
1Mx16 EDO dynamic ram memory
address mux for the DRAM
bootable/executable flash memory
flash memory for storing trend data
40mhz oscillator to generate CLK2
display control chip