Knob Interface Control; Push Button Control; Miscellaneous Control - Cs5 - Mallinckrodt NELLCOR NPB-4000 Service Manual

Patient monitor
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14.11 KNOB INTERFACE CONTROL

14.12 PUSH BUTTON CONTROL

14.13 MISCELLANEOUS CONTROL - CS5#

The knob consists of a rotary knob with a push button switch. The knob is
rotated and the cursor on the LCD display moves forward or backward,
depending on which way the knob is rotated. When the knob is pushed it must
be detected and indicated to the 386EX.
The knob has 2 channels, channel A and channel B. When clockwise rotation
occurs, channel A leads channel B and when counter clockwise rotation occurs,
channel B leads channel A. The software monitors the knob flip flop and when it
is set true the knob has turned. The direction is read by 2 other bits in the status
register and the software determines the knob direction. The KNOBINT flip
flop in the FPGA is reset by the software when a write to CS5# + A occurs. The
knob direction is determined by reading CS5# + A, bits 4 and 5.
The circuit which drives the knob is a 3.3 volt DC circuit, with appropriate
resistor values to allow the same current at 3.3 volts through the opto couplers as
would have occurred at 5 volts.
There are 5 push button switches and one knob push button switch. All of these
push buttons go to the FPGA control circuit except for the ON/OFF push button,
which goes directly to the power supply control circuit. Each of the push button
circuits have a debounce resistor and capacitor associated with them and then go
to the FPGA. The signals ALRMSIL, NIBPPB, AUDTONVOL,
LCDCONTRST, and KNOBPB go to the FPGA where they are "or' ed" together
and exit as PBINT. This is read by the software in the status register. The
software debounces and detects the length of time the push button is pressed.
The software determines which push button was pushed by reading CS5# + c,
bits 4-7.
The NIBP PUMP PWM, NIBP VALVE PWM, SPEAKER FREQUENCY
DUTY CYCLE, and a miscellaneous control register are all assigned to the I/O
space programmed to CS5#. The addressing scheme is as follows:
CS5#
NIBP PUMP/VALVE PWM 8 bits (R/W)
CS5# + 2
NU
CS5# + 4
SPEAKER HIGH VALUE 8 bits (R/W)
CS5# + 6
SPEAKER LOW VALUE 8 bits (R/W)
CS5# + 8
CONTROL REG. 8 bits (R/W)
CS5# + A
WRITE RESETS KNOB INT/READ PB AND KNOB
INT BITS, AND THE KNOB ROTATION DIRECTION
BITS
CS5# + C
WRITE WDTEN (WATCH DOG TIMER
ENABLE)/READ PUSH BUTTON SWITCHES AND
THE KNOB PUSH BUTTON
CS5# + E
WRITE NSCALL (BIT 7) and/or PTRRST (BIT 6)
Section 14: Main Color Board Digital Theory of Operation
14-17

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