Summary of Contents for Mallinckrodt NELLCOR NPB-4000
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NPB-4000/4000C Patient Monitor To contact Mallinckrodt, Inc. representative: in the United States, call 1-800-635-5267: outside of the United States, call your local Mallinckrodt representative. Caution: Federal law (U.S.A.) restricts this device to sale by or on the order of a physician.
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4280 Hacienda Drive Pleasanton, CA 94588 To obtain information about a warranty, if any, for this product, contact Mallinckrodt Technical Services or your local Mallinckrodt representative. Nellcor Puritan Bennett Inc. is a wholly owned subsidiary of Mallinckrodt Inc. Nellcor, Nellcor Puritan Bennett, Durasensor,and Oxisensor II are trademarks of Mallinckrodt Inc.
TABLE OF CONTENTS List of Figures List of Tables List of Figures....................vi List of Tables ....................viii Section 1: Introduction ................1-1 1.1 Manual Overview................ 1-1 1.2 Warnings, Cautions, and Notes ..........1-1 1.3 NPB-4000/C Patient Monitor Description ........1-1 1.4 Related Documents..............
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Contents Section 10: Introduction and System Description ........10-1 10.1 System Overview ..............10-1 10.2 System Block Diagram............. 10-1 10.3 ECG Processing............... 10-5 10.4 Respiration Processing ............10-6 10.5 NIBP Processing ..............10-6 10.6 SpO Processing..............10-6 10.7 Temperature Processing............10-6 Section 11: Isolated Front End Functions - Theory of Operation ..
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Contents 14.11 Knob Interface Control ............14-17 14.12 Push Button Control ............... 14-17 14.13 Miscellaneous Control - CS5#..........14-17 14.14 Speaker .................. 14-20 14.15 NIBP (Non Invasive Blood Pressure) Control......14-20 14.16 Front End Interface..............14-24 14.17 Digital Schematic..............14-26 14.18 Block Diagram................
Contents LIST OF FIGURES Figure 6-1: NPB-4000/C Disassembly Sequence Flow Chart, Sheet 1 .....6-3 Figure 6-2: NPB-4000/C Disassembly Sequence Flow Chart, Sheet 2 .....6-4 Figure 7-1: NPB-4000/C Top Assembly Drawing..........7-2 Figure 7-2: NPB-4000/C Front Case Assembly Diagram (Sheet 1 of 2)....7-4 Figure 7-3: NPB-4000/C Front Case Assembly Diagram (Sheet 2 of 2)....7-6 Figure 7-4: NPB-4000/C Rear Case Assembly Diagram (Sheet 1 of 2) ....7-8 Figure 7-5: NPB-4000/C Rear Case Assembly Diagram (Sheet 2 of 2) ..7-10...
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Contents Figure 16-1: Preamplifier and PGA Outputs ............16-9 Figure 16-2: Filter Outputs and ADC Input.............16-10 Figure 16-3: MP-205 with an SRC-2 Filter Output .........16-11 Figure 16-4: MP-205 with an SRC-2 LED Drive Current Test at TP7 ....16-12 Figure 16-5: MP-205 with SRC-2 Serial Port TXD Signal, U4 Pin 25 ...16-13 Figure 17-1: MP-205 PCB Schematic (Sheet 1 of 2) ........17-3 Figure 17-2: MP-205 PCB Schematic (Sheet 2 of 2) ........17-5 Figure 17-3: NPB-4000/C Power Supply PCB Schematic (Sheet 1 of 2)..17-7...
SECTION 1: INTRODUCTION 1.1 Manual Overview 1.2 Warnings, Cautions, and Notes 1.3 NPB-4000/C Patient Monitor Description 1.4 Related Documents 1. INTRODUCTION 1.1 MANUAL OVERVIEW This manual contains information for servicing the model NPB-4000 and NPB-4000C patient monitor, subsequently referred to as NPB-4000/C throughout this manual.
Section 1: Introduction 1.4 RELATED DOCUMENTS To perform test and troubleshooting procedures and to understand the principles of operation and circuit analysis sections of this manual, you must know how to operate the monitor. Refer to the NPB-4000/C operator’ s manual. To understand the various Nellcor sensors, ECG leads, blood pressure cuffs, and temperature probes that work with the monitor, refer to the individual directions for use that accompany these accessories.
Verify that the unit performs properly as described in paragraph 3.3. Perform the electrical safety tests detailed in paragraph 3.4. If the unit fails these electrical safety tests, do not attempt to repair. Contact Mallinckrodt Technical Services Department or your local Mallinckrodt representative.
A complete battery recharge requires 8 hours. The battery may require a full charge/discharge cycle to restore normal capacity. Mallinckrodt recommends that the NPB-4000/C’ s sealed, lead-acid batteries be replaced at 2-year intervals. Refer to Section 6, Disassembly Guide. 2.4 ENVIRONMENTAL PROTECTION Follow local governing ordinances and recycling plans regarding disposal or recycling batteries and other device components.
SECTION 3: PERFORMANCE VERIFICATION 3.1 Introduction 3.2 Equipment Needed 3.3 Performance Tests 3.4 Safety Tests 3. PERFORMANCE VERIFICATION 3.1 INTRODUCTION This section discusses the tests used to verify performance following repairs or during routine maintenance. All tests can be performed without removing the NPB-4000/C covers.
Section 3: Performance Verification 3.3 PERFORMANCE TESTS The battery charge and battery performance test should be performed before monitor repairs whenever the battery is suspected as being a source of the problems. All other tests may be used following repairs or during routine maintenance (if required by your local institution.
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Section 3: Performance Verification 5. Set NIBP simulator to simulate pressure setting of 120/80 mmHg and heart rate of 80 bpm. 6. Ensure monitor is not connected to AC power. 7. With NPB-4000/C turned off, press On/Standby switch and verify battery icon appears at bottom of display after power-on self-test is completed.
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Section 3: Performance Verification Note: The upper version number corresponds to the boot software, the lower version number corresponds to the operational software. Note: Power-on self-test takes approximately 10 seconds to complete. A beep signals end of power-on self-test Upon successful completion of power-on self-test, display will be in normal monitoring screen configuration.
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Section 3: Performance Verification Set SRC-2 as follows: SWITCH POSITION RATE LIGHT MODULATION RCAL/MODE RCAL 63/LOCAL Press monitor On/Standby switch to turn monitor on. After normal power-up sequence, verify SpO % display initially indicates zero. Note: The pulse bar may occasionally indicate a step change as the monitor is in the pulse search mode.
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Section 3: Performance Verification Verify the following: An audible alarm remains silenced. “Slashed bell” icon appears in each numeric frame on display. % and HEART RATE displays continue flashing. Heart rate tone is audible. Audible alarm returns in approximately 60 seconds. 3.3.4.1.2 Heart Rate Tone Volume Control Set up NPB-4000/C monitor and SRC-2 pulse oximeter tester as indicated in paragraph 3.3.4.1.1.
Section 3: Performance Verification Note: A “*” indicates values that produce an alarm. Press the Alarm Silence switch to temporarily silence the audible alarm. Table 3-2: Dynamic Operating Range SRC-2 Settings NPB-4000/C Indications RATE LIGHT MODULATION Pulse Rate HIGH2 79 - 83* 35 - 41* HIGH1 HIGH 79 - 83* 109 - 115...
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Section 3: Performance Verification 3.3.4.2 Operation with an ECG Simulator With monitor off, connect ECG leads to appropriate jacks on ECG tester. Connect leads to CE-10 ECG cable. Connect CE-10 to ECG input port on NPB-4000/C. Set ECG tester as follows: Heart rate: 30 bpm Amplitude:...
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Section 3: Performance Verification 14. Disconnect LL lead from ECG simulator. 15. Verify “Leads Off” alarm message appears, three dashes are displayed in HEART RATE display, and low priority audible alarm sounds. 16. Reconnect LL lead to ECG simulator. Verify “Leads Off” alarm message no longer appears and audible alarm is silenced.
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Section 3: Performance Verification 3.3.4.4 Verification of Pneumatic System Tests in paragraphs 3.3.4.4.1 through 3.3.4.4.5 verify the functionality of the NPB-4000/C pneumatic system. These tests are designed to use the Bio-Tek “BP Pump” noninvasive blood pressure simulator. The internal test volume of the Bio-Tek simulator is 250 cm , which is used to calculated the inflation/deflation rate periods.
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Section 3: Performance Verification Press Select button on simulator until simulator displays “Pressure Source Set Test Pressure”. Use Up/Down buttons on simulator to adjust for 250 mmHg. Press Start Pump button on simulator. The simulator will begin to pressurize. Note: The current pressure in mmHg will be displayed on both the simulator and NPB-4000/C displays.
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Section 3: Performance Verification Allow 15-20 seconds for pressure to stabilize. Record pressure displayed on NPB-4000/C. Initiate a 1-minute timer. 10. After 1 minute, record pressure displayed on NPB-4000/C. Note: The test will have been successfully completed if the pressure has dropped by 6 mmHg, or less, during the 1-minute period.
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Section 3: Performance Verification Note: Additional NIBP tests may be performed at this time. If no further NIBP tests are to be conducted, turn the NPB-4000/C off. Normal monitoring operation will return the next time the monitor is turned on. 3.3.4.4.4 Deflation Rate The deflation rate test verifies the deflation rate of the NPB-4000/C.
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Section 3: Performance Verification 3.3.4.4.5 Over-pressure The over-pressure test verifies the functionality of the over-pressure relief system of the NPB-4000/C. Ensure Bio-Tek simulator is in test mode. The simulator should display “Pressure Gauge”. Ensure simulator is set up for internal cuff. Ensure NIBP Test screen is active on NPB-4000/C.
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Section 3: Performance Verification Note: The accuracy of NPB-4000/C temperature measurements is ±0.1ø C (±0.2øF). In the procedure below, add the tolerance of the simulator to the acceptable range of readings. Press On/Standby switch to turn monitor on. After normal power-up sequence, verify temperature reads 37ø ±0.1ø C (98.6øF ±0.2øF if Fahrenheit is selected as temperature units.) Turn monitor off.
Section 3: Performance Verification 14. Verify that blood pressure values are reasonable for subject. 3.3.4.6.2 Serial Interface Test Perform the following procedure to test the serial port voltages. The test is qualitative and will only verify that the serial interface port is powered correctly, and that the “nurse call”...
Section 3: Performance Verification Verify monitor is responding to SpO simulator signal and audible alarm is sounding. Note: If desired, press the Alarm Silence switch to temporarily silence the audible alarm. Connect DMM positive lead to pin 9 and verify voltage value listed in Table 3-3.
Section 3: Performance Verification 3.4.2.1 Earth Leakage Current This test is in compliance with IEC 601-1 (earth Leakage current) and AAMI Standard ES1 (earth risk current). The applied voltage for AAMI ES1 is 120 Volts AC, 60 Hz, for IEC 601-1 the voltage is 264 Volts AC, 50 to 60 Hz. All measurements shall be made with the power switch in both “On”...
Section 3: Performance Verification Table 3-5: Enclosure Leakage Current Power Line AAMI/ANSI AC Line Neutral Line IEC 601-1 Ground Wire Cord Wire Standard 100 µA 100 µA Closed Closed Closed 500 µA 300 µA Closed Closed Open 500 µA 300 µA Closed Open Closed...
Section 3: Performance Verification Table 3-6: Patient Leakage Current Values Allowable Leakage Test Condition Current (microamps) Normal polarity Normal polarity; Neutral (L2) open Normal polarity; Earth open Reverse polarity Reverse polarity; Neutral (L2) open Reverse polarity; Earth open 3.4.2.4 Patient Leakage Current - (Mains Voltage on the Applied Part) This test measures patient leakage current in accordance with IEC 601-1, clause 19, for Class I, type CF equipment.
Section 3: Performance Verification Table 3-7: Patient Leakage Current Values— Mains Voltage on Applied Part Allowable Leakage Test Condition Current (microamps) Normal polarity Reverse polarity 3.4.2.5 Patient Auxiliary Current This test measures patient auxiliary current in accordance with IEC 601-1, clause 19, for Class 1, type CF equipment.
Section 3: Performance Verification Table 3-9: Allowable Leakage Current Polarity Neutral Line Power Line Allowable Leakage Wire (L2) Ground Wire Current (microamps) Normal Closed Normal Normal Open Normal Normal Closed Open Reversed Closed Normal Reversed Open Normal Reversed Closed Open 3-22...
SECTION 4: POWER-UP DEFAULTS MENU AND DIAGNOSTIC MODE 4.1 Introduction 4.2 Power-up Defaults Menu 4.3 Diagnostic Mode 4. POWER-UP DEFAULTS MENU AND DIAGNOSTIC MODE 4.1 INTRODUCTION This section discusses use of the Power-up Defaults Menu to configure power-on default settings, and the Diagnostic Mode to obtain service-related information about the monitor.
Section 4: Power-up Defaults Menu and Diagnostic Mode Table 4-1: Power-up Defaults Menu MENU ITEM CHOICES EXPLANATION Accept Current Settings “ Yes” If “ Yes” is chosen, the as Power-Up Defaults? current NPB-4000/C “ No” settings become the power-up defaults. Adult/Neonatal Mode Neonatal mode is not available at this time;...
Section 4: Power-up Defaults Menu and Diagnostic Mode Table 4-1: Power-up Defaults Menu MENU ITEM CHOICES EXPLANATION Language The language selected will “ English” be used for all the text “ French” shown on the display; the “ German” selected language will be “...
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Section 4: Power-up Defaults Menu and Diagnostic Mode The Diagnostic Menu lists the test and system-related information screens. Selection of an item in the menu will invoke that test or information screen. The test and information screens that appear in the Diagnostic Menu are as follows: •...
Section 4: Power-up Defaults Menu and Diagnostic Mode • System Software Version: Displays the revision level of the system software. The revision level is also momentarily shown on the LCD as part of the Copyright screen. This value may not be changed by the user. •...
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Section 4: Power-up Defaults Menu and Diagnostic Mode 4.3.4 NIPB Test An NIBP Test screen is provided to facilitate troubleshooting problems and performing verification testing for the NIBP subsystem. Typically, when these tests are performed, the pneumatic system is connected to an external pressure- reading device and a closed reference volume.
5.5 OBTAINING REPLACEMENT PARTS Mallinckrodt Technical Services provides technical assistance information and replacement parts. To obtain replacement parts, contact Mallinckrodt or your local Mallinckrodt representative. Refer to parts by the part names and part numbers listed in Section 7, Spare Parts.
Note: Taking the recommended actions discussed in this section will correct the majority of problems you will encounter. However, problems not covered here can be resolved by calling Mallinckrodt Technical Services or your local Mallinckrodt representative. Table 5-1: Problem Categories...
Section 5: Troubleshooting 5.6.1 Power Table 5-2 lists recommended actions to address power problems. Table 5-2: Power Problems Condition Recommended Action 1. The NPB-4000/C 1. Ensure power cord is plugged into operational AC fails to power-up outlet of appropriate voltage and frequency. Ensure when the green BATTERY CHARGING/AC SOURCE indicator On/Standby...
Section 5: Troubleshooting 5.6.2.1 Serviceable Hardware Error Codes Listed in Error! Reference source not found. are error codes that correspond to hardware problems, and the recommended actions to take should such an error be encountered. Table 5-3: Serviceable Hardware Error Codes Explanation Recommended Action Code...
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Turn monitor off, then on again. If error code still appears, take monitor out of service and contact Mallinckrodt Technical Services or your local Mallinckrodt representative for advice on remedial action. If monitor powers up and error code does not recur, enter Diagnostic Mode and invoke Error Code screen.
Section 5: Troubleshooting If Error Code screen indicates same error has occurred previously, take monitor out of service and contact Mallinckrodt Technical Services or your local Mallinckrodt representative for advice on remedial action. If Error Code screen indicates no previous occurrences of this error, monitor may be returned to service.
Section 5: Troubleshooting Table 5-5: Switches/Knob Problems Condition Recommended Action 1. NPB-4000/C fails to 1. Take steps as noted in paragraph 5.6.1. power-up when On/Standby switch is pressed. 2. NPB-4000/C powers- 1. Ensure keypad is plugged into Main PCB. If up, but some or one of connection is good, change keypad.
Section 5: Troubleshooting Table 5-6: Display/Audible Tones Problems Condition Recommended Action 3. Audible alarm does 1. Verify alarm volume setting in Alarm/Limits not sound. menu, and test operation of alarm tone by pressing Heart Rate Tone Volume switch while alarm volume setting is displayed. 2.
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Section 5: Troubleshooting Table 5-7: Operational Performance Problems Condition Recommended Action Printer paper will Open printer door and check paper is advance, but paper oriented correctly; paper should exit from remains blank when bottom of roll. See operator’ s manual for printing should be an illustration of correct paper orientation.
SECTION 6: DISASSEMBLY GUIDE 6.1 Introduction 6.2 How to Use this Section 6.3 Disassembly Sequence Flow Charts 6.4 Closed Case Disassembly Procedures 6.5 Front Case Disassembly Procedures 6.6 Rear Case Disassembly Procedures 6. DISASSEMBLY GUIDE WARNING: Performance Verification. Do not place the NPB-4000/C into operation after repair or maintenance has been performed, until all Performance Tests and Safety Tests listed in Section 3 of this service manual have been performed.
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Section 6: Disassembly Guide The ovals on the flow charts contain reference designators that point to specific steps in the Disassembly Procedures. The Disassembly Procedures, paragraphs 6.4, 6.5, and 6.6 contain detailed disassembly instructions, accompanied by illustrations. The rectangular boxes on the flow charts represent the various components or sub-assemblies.
Section 6: Disassembly Guide Figure 6-2: NPB-4000/C Disassembly Sequence Flow Chart, Sheet 2 6.4 CLOSED CASE DISASSEMBLY PROCEDURES This section describes the items that may be removed/replaced without disassembling the main case of the monitor. Step A1 Procedure To remove front panel knob: a) Knob is friction-fit on encoder shaft.
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Section 6: Disassembly Guide Step A2 Procedure To remove carrying handle: a) Use screwdriver to remove two fastening screws and washers. Retain for reassembly. b) Remove handle by sliding it straight back toward rear of monitor. Illustration Step A3 Procedure To remove printer: a) Press Paper Eject button on printer (right side).
Section 6: Disassembly Guide 6.5 FRONT CASE DISASSEMBLY PROCEDURES This section describes the steps to separate the front and rear case assemblies, and the items that may be removed/replaced on the front case assembly. Step B1 Procedure To separate front and rear case assemblies: a) Remove handle as indicated in step A1.
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Section 6: Disassembly Guide Procedure d) Disconnect large ribbon-cable connector from main PCB. e) Unscrew NIBP tubing connector from pump to main PCB. Front and rear case assemblies are now completely separable from one another. Illustration module Step B2 Procedure To remove SpO module, ECG/Temp connector assembly, and encoder assembly:...
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Section 6: Disassembly Guide Step B3 Procedure To remove main PCB: a) Disconnect connectors, from main PCB, for: • Switch panel • • ECG/Temp • Encoder • LCD (display) • Backlight Illustration Encoder NIBP Tubing cable Switchpanel connector connector...
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Section 6: Disassembly Guide Procedure b) Use screwdriver to remove six fastening screws around periphery of main PCB. Retain fastening screws for reassembly. c) Lift main PCB slightly and unscrew tubing connector near NIBP front panel fitting. d) Main PCB may now be removed. This allows access to SpO front panel connector, NIBP fitting and backlight inverter.
Section 6: Disassembly Guide 6.6 REAR CASE DISASSEMBLY PROCEDURES This section describes the items that may be removed/replaced on the rear case assembly. First perform the procedure described in step B1 to separate the front and rear case assemblies. Step C1 Procedure To remove battery: a) Use screwdriver to remove three screws holding battery cover plate in...
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Section 6: Disassembly Guide Procedure b) Grasp strap, accessible through opening in top foam cover, and gently pull battery from its housing. Illustration Procedure c) Remove wire connectors from battery clips. Remember red wire is connected to plus (+) side of battery pack. Illustration 6-11...
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Section 6: Disassembly Guide Step C2 Procedure To remove battery housing: a) Remove battery as described in step C1. Carefully remove two foam battery pads from battery housing. b) If a printer is installed, remove it as described in step A3. c) If a printer is not installed, remove printer blanking cover by slipping small flat-blade screwdriver into one of the slots on the blanking cover.
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Section 6: Disassembly Guide Procedure d) On rear panel of monitor, remove three screws fastening battery housing. e) Carefully slide battery housing from rear case assembly. Illustration Screws fastening battery housing Procedure Disconnect speaker twisted-pair-connector from power supply PCB. Speaker is mounted on one side of battery housing. g) If printer had been installed, disconnect ribbon cable from printer PCB.
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Section 6: Disassembly Guide Step C3 Procedure To remove fuses: a) Remove AC power input fuses, as shown, using fuse pullers. Illustration Fuse F1 and F2 Step C4 Procedure To remove power supply assembly: a) On rear panel of monitor, remove eight screws fastening power supply assembly.
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Section 6: Disassembly Guide Procedure b) Carefully lift power supply assembly from rear case. c) Power supply assembly may be disassembled into the following elements: • Power supply PCB • NIBP pump • Heat sink/chassis • Main ribbon cable Illustration 6-15...
SECTION 7: SPARE PARTS 7.1 Introduction 7. SPARE PARTS 7.1 INTRODUCTION Spare parts, along with part numbers, are shown in Table 7-1 through Table 7-7. “Item No.” corresponds to the circled callout numbers in Figure 7-1 through Figure 7-6. The “Step Ref.” corresponds to the disassembly steps described in Section 6.
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Section 7: Spare Parts Figure 7-1: NPB-4000/C Top Assembly Drawing...
8.1 GENERAL INSTRUCTIONS Pack the monitor carefully. Failure to follow the instructions in this section may result in loss or damage not covered by the Mallinckrodt warranty. If the original shipping carton is not available, use another suitable carton; North American customers may call Mallinckrodt Technical Services to obtain a shipping carton.
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Section 8: Packing for Shipment Seal the carton with packing tape. Label the carton with the shipping address, return address, and RGA number, if applicable.
SECTION 9: SPECIFICATIONS 9.1 Scope 9.2 General 9.3 Electrical 9.4 Environmental 9.5 Measuring Parameters 9.6 Trends 9. SPECIFICATIONS 9.1 SCOPE This section includes specifications for the NPB-4000/C. The instrument is designed to monitor patient vital signs, including: electrocardiogram and heart rate, respiration rate, noninvasive blood pressure, blood oxygen saturation, and temperature.
Section 9: Specifications 9.5 MEASURING PARAMETERS 9.5.1 ECG Measurement/Display Heart Rate Range: 20 BPM - 250 BPM Heart Rate Accuracy: ±5 BPM Bandwidth: Normal 0.5 Hz to 40 Hz Monitoring: Extended Low 0.05 Hz to 40 Hz Frequency Response: Leads: 3 Lead (user selectable) Display Sweep 12.5 mm/sec, 25 mm/sec, and 50 mm/sec...
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Section 9: Specifications Response to irregular a) Ventricular bigeminy - 80 BPM rhythm. 3.1.2.1(e) b) Slow alternating ventricular bigeminy - 60 BPM c) Rapid alternating ventricular bigeminy - 120 BPM d) Bi-directional systoles - 89 to 96 BPM Heart rate meter a) Change from 80 to 120 BPM: 4 to 6 sec response time.
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Section 9: Specifications 9.5.3 NIBP (Noninvasive Blood Pressure) Measurement/Display Note: Systolic and diastolic blood pressure measurements determined with this device are equivalent to those obtained by a trained observer using the cuff/stethoscope auscultation method, within the limits prescribed by the American National Standard, Electronic or automated sphygmomanometers.
Section 9: Specifications 9.5.5 SpO Measurement/Display Range: Pulse Rate: 20 BPM to 250 BPM % Saturation: 0 % to 100% Accuracy: Pulse Rate: ±3 BPM 70 % to 100%: ±2 digits 0 % to 69%: Unspecified accuracies are expressed as plus or minus “X” digits (saturation percentage points) between saturations of 70–100%.
SECTION 10: INTRODUCTION AND SYSTEM DESCRIPTION 10.1 System Overview 10.2 System Block Diagram 10.3 ECG Processing 10.4 Respiration Processing 10.5 NIBP Processing 10.6 SpO Processing 10.7 Temperature Processing 10. INTRODUCTION AND SYSTEM DESCRIPTION 10.1 SYSTEM OVERVIEW 10.1.1 The Complete NPB-4000/C Patient Monitor System The NPB-4000/C patient monitor is a full-function monitor for use on adult and pediatric patients.
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Section 10: Introduction and System Description Figure 10-1: NPB-4000/C System Block Diagram 10.2.1 Isolated Front End The Isolated Front End section includes all the circuitry to convert ECG, SpO and temperature measurements to digital format and to connect this information to the processor.
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Section 10: Introduction and System Description 10.2.4 µP, Memory, and Control The microprocessor (µP), Memory, and Control section contains the system CPU and all digital support circuitry. The latter includes the RAM, nonvolatile memory, and real-time clock. This section also contains the display logic, keypad (switch) interface logic, RS-232 I/O control, defibrillator synchronization control, and printer logic.
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Section 10: Introduction and System Description NPB-4000C. Pressing the Contrast switch changes the background color from white to black or black to white. Operation of the Volume switch accomplishes similar functions for the volume of the heart rate audible tone as the display contrast control switch does for the display.
Section 10: Introduction and System Description 10.2.11 Recorder The optional recorder (printer) module is installed in the right panel of the monitor. Refer to the NPB-4000/C monitor operator’ s manual for printing procedures. It provides users with the capability to obtain hard-copy records of selected vital signs information.
Section 10: Introduction and System Description The patient’ s respiration is detected by using two of the three leads of the ECG electrodes and cable. A low-level excitation signal is applied to these leads, and the variation of the thoracic impedance caused by the breathing is sensed and processed for display and measurement.
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Section 10: Introduction and System Description The NPB-4000/C patient monitor is designed to accept the signals from electrically isolated Series 400 probes manufactured by Yellow Springs Incorporated. Interchangeable probes in this series may be used for esophageal, rectal, skin or surface, or airway temperature measurement. Probes are furnished with a standard 10-feet lead;...
Section 11: Isolated Front End Functions -- Theory of Operation Figure 11-2: Isolated Front End Block Diagram The NPB-4000/C Front End module is a part of the Main Board. It provides an isolation barrier between a patient’ s body and electrical potentials on the rest of the board as well as some high voltage protection of the isolation barrier itself.
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Section 11: Isolated Front End Functions -- Theory of Operation • Isolation is provided by optocouplers. A total of four optocouplers are used for digital signals and a linear optocoupler with a multiplexer is used for all analog signals. The isolated side has its own power supply which generates +5 volts and -5 volts for analog circuitry and +5 volts for digital circuitry.
Section 11: Isolated Front End Functions -- Theory of Operation 11.3 INTERFACE CIRCUIT Figure 11-4: Interface Circuit Block Diagram The interface circuit shown in the highlighted portion of the expanded block diagram, provides physical connection between patient connectors on the unit and preamplifier and other signal conditioning circuitry of the isolated Front End.
Section 11: Isolated Front End Functions -- Theory of Operation The SpO sensor signal is brought through a panel connector and a separate panel cable to the board connectors J101 and J100. The Front End also has an output connector J10, into which the SpO module (MP-205) is plugged.
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Section 11: Isolated Front End Functions -- Theory of Operation The preamplifier is followed by a 0.05 Hz high-pass filter made of capacitor C147 and resistors R248 and R249. The corner frequency can be changed by software to 0.5 Hz, set by resistors R238 and R250 and switch U63B. If a common mode charge on the capacitor C147 will offset the baseline to the point where ESG signal clipping is detected, it can be quickly removed under software control through the analog switch U63C and limiting resistor R239.
Section 11: Isolated Front End Functions -- Theory of Operation 11.5 RESPIRATORY CIRCUIT Figure 11-6: Respiratory Circuit Block Diagram As shown in the highlighted portion of the expanded block diagram, Figure 11-6, the Respiratory circuitry includes the ECG leads, and some control circuitry. Respiration is detected by measuring modulation of a high frequency AC signal sent to a body.
Section 11: Isolated Front End Functions -- Theory of Operation 11.7 OPTOCOUPLERS Figure 11-7: Optocouplers Block Diagram See Figure 11-7. The optical couplers that isolate the Front End signals from the non-isolated digital hardware are of two types: Linear and Digital. 11.7.1 Linear optocoupler All analog signals, ECG, Respiration, Temperature, VREF and AGND, as well as voltage levels of binary signals PM( pacemaker), QRS (R-wave), and...
Section 11: Isolated Front End Functions -- Theory of Operation 11.8 CONTROLS Figure 11-8: Controls Block Diagram See Figure 11-8. The isolated control signals are developed and applied in the highlighted blocks as shown in the block diagram. Front end operations are controlled by serial signals on ADCTX line clocked by signals on ADCCLK line.
Section 11: Isolated Front End Functions -- Theory of Operation The parity bit is set for odd and is checked in the odd/even parity checker U65. Even parity, if detected, represents an error and the U65 output signal will turn on switch U63A.
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Section 11: Isolated Front End Functions -- Theory of Operation bursts. This will provide enough time out for multiplexer control data to be latched. The multiplexer has at least four clock cycles of I/O CLOCK to settle before A/D sampling begins. Data bits are assigned as follows: Input Data Bits Address Bits...
Section 11: Isolated Front End Functions -- Theory of Operation 11.10 ISOLATED POWER SUPPLY The isolated power supply consists of high-current switched driver, U54, isolation transformer T1, two full-wave rectifiers with dual diodes D11 and D10, filter capacitors C122 and C127 and three voltage regulators. Regulators U83 and U68 provide +5 volts and -5 volts for analog circuitry and regulator U69 provides +5 volts for digital circuitry on both Front End and SpO boards.
SECTION 12: NIBP - THEORY OF OPERATION 12.1 NIBP System Overview 12.2 The Pneumatic Assembly 12.3 NIBP Hardware 12. NIBP - THEORY OF OPERATION 12.1 NIBP SYSTEM OVERVIEW See Figure 12-1. The NPB-4000/C noninvasive blood pressure (NIBP) measurement and display operations described in this section include the pneumatics of the inflatable cuff and control valves, the specialized Front End NIBP circuitry, some of the microprocessor memory and control circuitry, some of the power system, and specific switches on the keypad.
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Section 12: NIBP - Theory of Operation Figure 12-2: NIBP System Block Diagram Prior to making blood pressure measurements, the cuff is placed around a limb, typically an upper arm (left or right). The NIBP measurement system is initiated by commands responding to pressing the NIBP Start/Stop switch on the front panel.
Section 12: NIBP - Theory of Operation 12.2 THE PNEUMATIC ASSEMBLY The pneumatic assembly, consisting of the pump, two controlling valves, and tubing to connect the various pneumatic components together are illustrated in the schematic diagram that follows. See Figure 12-4. The pump output is connected to the cuff and to two valves: a two-way proportional control valve (V2) and a three-way valve (V1), as well as to two pressure transducers.
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Section 12: NIBP - Theory of Operation 12.3.1 Pressure Transducers Pressure transducers PS1 and PS2 convert pneumatic pressure levels to voltages in the range from 0.33 volts at 0 mmHg to 4 volts at 300 mmHg. Transducer PS1 is used to sense the main cuff pressure. Transducer PS2 is used as a backup cuff pressure sensor, from which over-pressure warning signals are obtained.
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Section 12: NIBP - Theory of Operation 12.3.6 NIBP Pump Control Note: The following description is duplicated in the Power Supply section. Reference designations for the two paragraphs that follow are found in power supply schematic drawing, Figure 17-3and Figure 17-4. The power supply mechanical assembly holds the blood pressure pump and shield.
SECTION 13: MICROPROCESSOR COMPUTER AND CONTROL – THEORY OF OPERATION 13.1 General 13.2 Power Supply Connections 13.3 NIBP Processing 13.4 Recorder Operation 13.5 Isolated Front End Power Interface 13.6 SpO Interface 13.7 Isolated Front End Power Signals 13.8 RS-232 Serial Port Interface 13.9 CPU Connections 13.10 Knob Interface Control 13.11 Push Switch Control...
Section 13: Microprocessor Computer and Control –Theory of Operation The SpO unit (MP-205) is connected to an asynchronous serial port via opto- isolators. The push switches and rotating knob interface to the 386EX via the FPGA circuit. They are polled by the software at a 200-Hz rate. The speaker is connected to an amplifier circuit, that is connected to a digital potentiometer.
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Section 13: Microprocessor Computer and Control –Theory of Operation 13.2.2 Microcontroller Signals The battery and microcontroller have two signals that connect directly with each other, EARLY WARNING and PS OFF. The battery circuits generate an EARLY WARNING signal to the microcontroller that the power is going down within 100 millisecond.
Section 13: Microprocessor Computer and Control –Theory of Operation 13.3 NIBP PROCESSING See Figure 13-2. The NIBP circuits consist of microprocessor control for turning on and off certain signals, control logic generating the pump PWM and valve PWM, and status signals. Figure 13-2: NIBP Processing Circuitry Block Diagram 13.3.1 NIBP Signals Going to the A/D Converter The NIBP circuits generate three analog signals which must be converted to a...
Section 13: Microprocessor Computer and Control –Theory of Operation of them is buffered by a logic gate that is connected to 5 volts. The inputs to these buffers are TTL-compatible and will switch when the input goes below 0.8 volts or above 2.4 volts. 13.3.5 Analog Power On/Off - Port 1 Bit 1 This signal turns on the power to the NIBP circuits via a regulator run from the battery.
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Section 13: Microprocessor Computer and Control –Theory of Operation Figure 13-3: Recorder System Block Diagram 13.4.1 Recorder/Microcontroller Interface The recorder is interfaced to the microcontroller via a DUART that has two UARTs programmed by the software. The DUART has a UART0 and a UART1, each with a full UART signal complement.
Section 13: Microprocessor Computer and Control –Theory of Operation 13.5 ISOLATED FRONT END INTERFACE Figure 13-4: Isolated Front End Block Diagram See Figure 13-4. The interface to the Front End electronics is shown above and consists of using the microprocessor’ s synchronous serial unit to interface to the A/D converter.
Section 13: Microprocessor Computer and Control –Theory of Operation 13.5.2 16-Bit Word Transmitted to the A/D Converter and Front End Figure: 13-5: 16 Bit Word 13.5.3 A/D Converter Receiver Control The A/D converter is a pipelined converter and transmits the result of the previous conversion when receiving the next transmission for a conversion.
Section 13: Microprocessor Computer and Control –Theory of Operation 13.7 CPU CONNECTIONS The processor in this system is a 386EX. The 386EX contains a 386SX core and integrated peripherals. It operates from a 40-MHz oscillator, and includes the following on-board peripherals: DMA Controller Unit Bus Interface Unit Chip-select Unit...
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Section 13: Microprocessor Computer and Control –Theory of Operation 13.7.3 Port 3 Bits Port 3 bits used are as follows: Defib key input - in PSOFF - out Defib sync pulse - out NIBP PV enable - in 13.7.4 Chip Select Unit The chip select unit has 8 chip selects and are defined as follows: CS0: LCD control register select - eight-bit I/O...
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Section 13: Microprocessor Computer and Control –Theory of Operation 13.7.7 Synchronous Serial Port The synchronous serial port is connected to the A/D converter. The signals used are as follows: STXCLK: synchronous transmit clock SRXCLK: synchronous receive clock SSIOTX: synchronous transmit data SSIORX: synchronous receive data The STXCLK signal is generated in the FPGA circuit each time Timer 1 initiates...
Section 13: Microprocessor Computer and Control –Theory of Operation 13.7.10 CPU Timing Signals The 386EX runs from a 40 MHz crystal oscillator and the main timing is derived from this clock. It is called CLK2. Inside the CPU, CLK2 is divided by two, generating two new clocks, PH1 and PH2.
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Section 13: Microprocessor Computer and Control –Theory of Operation 13.8.2 DRAM Timing 25ns 25ns CLK2 RAS# RAS# 75ns CASADREN 50ns 50ns U/LCAS 75ns DRAMWR# DRAMOE# 75ns Figure 13-8: DRAM Timing See Figure 13-8. The DRAM requires 130 nanoseconds total time, read/write and precharge for each cycle.
Section 13: Microprocessor Computer and Control –Theory of Operation RAS# 70NS 50NS 10NS 10NS ROW/COL ADDR VALID VALID COL 10NS 15NS UCAL/LCAS# 20NS 20NS Figure 13-9: RAS# and CAS# Requirements 13.8.3 DRAM FPGA Circuits The DRAM control circuits in the FPGA must decode the various 386EX control signals and generate the DRAM signals.
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Section 13: Microprocessor Computer and Control –Theory of Operation 7FFFF, which is 80000 to FFFFF in bytes. This is the upper portion of the space. The trend flash is assigned to the 32k byte space above the video ram, that is, 84000 to 8FFFF words, or 11000 to 14000 bytes. The software, however, has the ability to overlap the trend flash address with the executable flash address.
Section 13: Microprocessor Computer and Control –Theory of Operation 13.9.2 Flash FPGA Control Circuit The FPGA decodes the boot flash and trend flash select signals and generates the boot flash (FLSH1CE#) signal whenever the trend flash is not being accessed. Since the trend flash address space may overlap the boot flash space, the trend flash has priority.
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Section 13: Microprocessor Computer and Control –Theory of Operation 13.10.1 LCD Control There are two chip selects assigned to the LCD display chip: one for the control registers inside the chip, and one for the display memory space. The chip itself has a state machine controller inside, and generates the necessary signals to store and retrieve data from the memory when requested.
Section 13: Microprocessor Computer and Control –Theory of Operation Both read and write transfers between the 386EX and the 1351FLB are defined in the 1351FLB manual, pages 1-33 and 1-34. The timing specifications of the 1351FLB for reading and writing data to and from the control registers or display RAM, allow a direct interface to the 386EX.
Section 13: Microprocessor Computer and Control –Theory of Operation Figure 13-13: Interface Timing 13.12 DUART Control See Figure 13-14. The DUART is a Startech ST16C2550CJ44 which consists of 2 UARTs and fifos for the read and write portions of each UART. Channel 0 is assigned to the RS-232 port, which exits the unit near the AC and DC inputs.
Section 13: Microprocessor Computer and Control –Theory of Operation The knob has two channels: channel A and channel B. When clockwise rotation occurs, channel A leads channel B and when counterclockwise rotation occurs, channel B leads channel A. The software monitors the knob flip flop, and when it is set true, the knob has turned.
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Section 13: Microprocessor Computer and Control –Theory of Operation The NIBP valve pulse width modulated (NIBPCNTLVLV) signal is generated in the FPGA via this same eight-bit register, which is clocked at 313 kHz. An eight-bit value is loaded into this register, and then the VALVE_PWM_GO bit (bit 1) in the control reg.
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Section 13: Microprocessor Computer and Control –Theory of Operation Bit 7 resets the A/D converter and is generated when software starts a conversion sequence. 13.15.4 CS5# + A RESET KNOB INT/READ PUSH SWITCHS The I/O address of CS5# + 6 has two functions associated with it. Writing to this register generates a KNOB_INT_RST signal which resets the knob interrupt flip flops.
Section 13: Microprocessor Computer and Control –Theory of Operation Register CS5# + E has the following bit assignments Bit 0 Not used BIT 1 Not used BIT 2 Not used BIT 3 Not used BIT 4 Not used BIT 5 NURSE CALL BIT 6 PRINTER RESET BIT 7 PRINTER CTS (CLEAR TO SEND) The NURSECALL and PRINTER RESET bits are the flip flop outputs...
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Section 13: Microprocessor Computer and Control –Theory of Operation Page 2 of the schematics contains the NIBP circuits, the speaker circuits, the LCD contrast circuit, the battery voltage and temperature input circuits, the push-switch interface circuit, and the backlight interface connector circuit. The 50-pin connector connects to the recorder, RS-232 connector, the power supply connector, the defib connector, and the speaker.
Section 13: Microprocessor Computer and Control –Theory of Operation 13.17 CURRENT DRAIN OF DIGITAL ELECTRONICS The current drain has been determined by using the maximum numbers in the data sheets of the devices. Typically, the devices operate significantly lower. 386EX 130 mA 4M DRAM 95 mA...
SECTION 14: MAIN COLOR BOARD DIGITAL THEORY OF OPERATION 14.1 General 14.2 Power Supply Connections 14.3 CPU Connections 14.4 LNA 386EX Connections 14.5 CPU Timing 14.6 Dram Control 14.7 Flash Control 14.8 LCD Display 14.9 Real Time Clock (RTC) 14.10 DUART Control 14.11 Knob Interface Control 14.12 Push Button Control 14.13 Miscellaneous Control - CS5#...
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Section 14: Main Color Board Digital Theory of Operation A RTC (real time clock) chip keeps the date and time of day. This unit has 64 bytes of battery backed up ram, 14 bytes are used for the RTC, and 50 bytes are available for the software to use.
Section 14: Main Color Board Digital Theory of Operation 14.2 POWER SUPPLY CONNECTIONS Figure 14-1: Power Supply Connections The power supply provides the power for the main board and all of the circuitry in the system. It also contains control circuits for turning on and off the power, as well as supplying the battery backup for the system.
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Section 14: Main Color Board Digital Theory of Operation 14.2.2 Microcontroller Signals The power supply circuit and microcontroller have 2 signals which connect directly with each other, EARLY WARNING and PSOFF. The battery circuits generate an EARLY WARNING signal to the microcontroller to warn it that the power is going down within 100 ms.
Section 14: Main Color Board Digital Theory of Operation 14.3 CPU CONNECTIONS The CPU (U7) is a 386EX microcontroller, which contains a 386SX core and various integrated peripherals. The 386EX operates from a 40 MHz oscillator (X3) and has the following on board peripherals: •...
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Section 14: Main Color Board Digital Theory of Operation 14.3.4 CHIP SELECT UNIT The chip select unit has 8 chip selects and are defined as follows: CS0: LCD control register select - 8 bit I/O CS1: LCD memory select - 16 bit memory CS2: Trend flash select - 8 bit memory CS3:...
Section 14: Main Color Board Digital Theory of Operation time a new conversion is initiated the previous conversion’ s data is transferred to the 386EX via the SSIORX data line. 14.3.8 ASYNCHRONOUS SERIAL PORT There are 2 asynchronous UART ports on the 386EX, but only one is used. It is connected to the opto-isolators that connect to the SPO2 unit.
Section 14: Main Color Board Digital Theory of Operation 14.5.1 CPU SIGNALS Various signals change at various times within a cycle, and the generic timing is shown below. Some of the key signals are ADS#, M/IO#, D/C#, W/R#, WR#, RD#, CS0-CS6#, BLE#, and BHE#. Typical control circuits will look at ADS# at the end of PH2 and make decisions at this time.
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Section 14: Main Color Board Digital Theory of Operation 14.6.1.1 DRAM TIMING Figure 14-4: DRAM Timing The DRAM requires 104 ns total time, read/write and precharge for each cycle. There is 1 wait state for each DRAM access and a total of 3 T states which is 150 ns.
Section 14: Main Color Board Digital Theory of Operation 14.6.2 DRAM FPGA CIRCUITS The DRAM control circuits in the FPGA must decode the various 386EX control signals and generate the DRAM signals. This is done by using CS6# to set a flip flop when ADS# and PH2 are true.
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Section 14: Main Color Board Digital Theory of Operation Figure 14-6: Flash Read Timing In the FPGA control logic, the executable flash chip select is anded with the trend flash chip select such that CS2* must be high, inactive, when addressing the executable flash.
Section 14: Main Color Board Digital Theory of Operation Since the boot flash is for booting up and executing the software program, most accesses to the boot flash are reads. Only when a new program is downloaded will a write to the boot flash occur. 14.7.3 TREND FLASH The trend flash is different.
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Section 14: Main Color Board Digital Theory of Operation The processor interface consists of the following signals. CS# is the chip select for the SED1354. It connects directly from the FPGA pin 53 to the SED1345. This signal will go low whenever there is an access by the 386EX to CS0# or CS1#.
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Section 14: Main Color Board Digital Theory of Operation The above signals are all of the signals used to interface to the 386EX for transferring of data to and from the control registers and the display ram. There are some general purpose I/O ports that are under software control. They can be programmed as inputs or outputs.
Section 14: Main Color Board Digital Theory of Operation 14.8.3 LCD AND 386EX INTERFACE The LCD display chip interfaces directly with the 386EX. When the 386EX initiates a transfer to the 1354F0A, the 386EX generates two wait states and terminates the cycle when the WAIT# signal of the 1354 returns high. This is true for transfers to the 1354F0A’...
Section 14: Main Color Board Digital Theory of Operation Figure 14-9: Interface Timing The timing diagram above shows the signals and their relationship to each other. 14.10 DUART CONTROL The DUART is a Startech ST16C2550CJ44 which consists of 2 UARTs and FIFOS for the read and write portions of each UART.
Section 14: Main Color Board Digital Theory of Operation 14.11 KNOB INTERFACE CONTROL The knob consists of a rotary knob with a push button switch. The knob is rotated and the cursor on the LCD display moves forward or backward, depending on which way the knob is rotated.
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Section 14: Main Color Board Digital Theory of Operation 14.13.1 CS5# NIBP PUMP PWM 8 BITS The NIBP pump pulse width modulated (PUMP_PWM) signal is generated in the FPGA via an 8 bit register which is clocked at 313 kHz. An 8 bit value is loaded into this register and then the PUMP_PWM_GO bit (bit 0) in the CONTROL REG.
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Section 14: Main Color Board Digital Theory of Operation Bits 0-3 were defined in the above paragraphs. Bit 4, BCK_LITE_ON is a bit that turns on the LCD backlight when set to a 1. When powered on this bit is 0 and the backlight is off.
Section 14: Main Color Board Digital Theory of Operation Register CS5# + C has the following bit assignments. BIT 0: Not used BIT 1: Not used BIT 2: Not used BIT 3: WDT (watch dog timer enable) BIT 4: LCD contrast switch BIT 5: Audio volume switch BIT 6: NIBP switch BIT 7: Alarm silence button...
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Section 14: Main Color Board Digital Theory of Operation 14.15.1 NIBP System Overview The NPB-4000C Non-Invasive Blood Pressure (NIBP) measurement and display operations described in this section include the pneumatics of the inflatable cuff µ and control valves, the specialized front end NIBP circuitry, some of the Memory and Control circuitry, some of the Power System, and specific switches on the Keypad.
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Section 14: Main Color Board Digital Theory of Operation 14.15.1.1 The pneumatic assembly The pneumatic assembly, consisting of the pump, two controlling valves, and tubing to connect the various pneumatic components together are illustrated in the schematic diagram that follows. See Figure 14-12.
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Section 14: Main Color Board Digital Theory of Operation Figure 14-13: NIBP Hardware Block Diagram 14.15.1.2.1 Pressure Transducers Pressure transducers PS1 and PS2 convert pneumatic pressure levels to voltages in the range from 0.33 volts at 0 mmHg to 4 volts at 300 mmHg. Transducer PS1 is used to sense the main cuff pressure.
Section 14: Main Color Board Digital Theory of Operation 14.15.1.2.5 Pump and Valve Drivers Three-way valve V1 coil is powered by VPS that is switched in series with the coil through n-channel MOSFET Q10-6. Switching action of Q10-6 is controlled by the input signal NP3WYV, that is gated by the enabling signal NPPVEN at switch U23.
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Section 14: Main Color Board Digital Theory of Operation the previous conversion is transferred to the 386EX. The SSIO unit works with the both of the DMA units in the 386EX as well as the timer unit. The functional operation of the DMA, SSIO, A/D Converter, and the front end is as follows.
Section 14: Main Color Board Digital Theory of Operation The control words sent to the A/D converter contain the A/D multiplexer channel to convert, the data length, data format, and whether the conversion is a unipolar or bipolar conversion. The first bit transferred out the SSIO transmit line is the most significant bit, bit 15.
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Section 14: Main Color Board Digital Theory of Operation The speaker circuit consists of a software programmable digital potentiometer chip, U28, which is a Dallas DS1666s-10. The software sets the tone frequency by setting the high register with a value, the low register with a value, then programming the digital potentiometer up/down according to the timing specified in the requirement specification.
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Section 14: Main Color Board Digital Theory of Operation 14.17.3 RAS/ CONTROL CIRCUIT The RAS/ control circuit consists of 5 flip flops called STARTFF, DRAMINFF, RAS1FF, RAS2FF, and RAS3FF. The ADS/ signal from the 386EX is anded with the CLK_PH2 signal and then goes to the IDE/ input of the DRAMINFF. CS6/ (DRAM chip select) goes to the D input.
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Section 14: Main Color Board Digital Theory of Operation 14.17.3.2 DRAMOE/ CONTROL CIRCUIT The DRAMOE/ signal enables the output drivers in the DRAM which is activated on a read of the DRAM memory. DRAMOE/ is generated from RAS1/, BLEORBHE, WRB/, and LCD_MEM_SEL/. The RAS1/ must be low, indicating that a DRAM access is beginning.
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Section 14: Main Color Board Digital Theory of Operation 14.17.4 CONTROL REGISTER DECODE The CONTROL REGISTER decoder is a 1 of 8 decoder which decodes the register addresses for the 8 control registers in the FPGA. The decoder generates a high going pulse coincident with WRB/ on 1 of the 8 output signal lines. The register addresses are as follows: 1.
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Section 14: Main Color Board Digital Theory of Operation 14.17.9 FLASH WRITE STATE MACHINE The FLASH write state machine consists of 5 flip flops and is set into action when CS2/ or UCS/ is low, CLK_PH1 is high ( which indicates the first phase of the T2 state), WRB/ is low, and BLEORBHE is high indicating a byte or word transfer.
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Section 14: Main Color Board Digital Theory of Operation 14.17.13 RTC/DUART STATE MACHINE Interfacing to the DUART and RTC requires slowing down the signals. A 20 state machine is implemented to interface to these circuits. The state machine always starts up when ADSB/ is low and CLK_PH1 is high. The RTC1AFF is set high on the rising edge of the master clock, CLK2_40MHZ.
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Section 14: Main Color Board Digital Theory of Operation 14.17.16 FREQUENCY GENERATOR The master clock in, generates 2 internal signals, CLK_PH1 and CLK_PH2, both of which are 20 MHz clocks 180 degrees out of phase with each other. The CLK_PH1 is divided down into 10 MHz, 5 MHz, 2.5 MHz, 1.25 MHz, 525 kHz, 313 kHz, 156 kHz, and 78 kHz.
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Section 14: Main Color Board Digital Theory of Operation 14.17.18 READ BACK MULTIPLEXER A read back multiplexer allows the software to read back programmed and status signals from the FPGA. Register assignments are as follows: 1. PUMP/VALVE PWM 300 HEX 2.
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Section 14: Main Color Board Digital Theory of Operation 14.17.20 SPEAKER HIGH AND LOW CONTROL The speaker requires tones from about 300 Hz to 1 kHz with a 55 percent duty cycle. In order to give software full control over both the frequency and duty cycle, there are 2 software programmable 8 bit up counters, one for generating the low portion of the TONE_OUT and one for generating the high portion.
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Section 14: Main Color Board Digital Theory of Operation 14.17.21.5 FE_CLK_EN BIT Bit 5 is the FE_CLK_EN which stands for the front end clock enable bit. This bit enables the 200 kHz signal to the front end power supply transformer. The software has control over the front end power supply via this bit.
Section 14: Main Color Board Digital Theory of Operation 14.17.23 SYNC_ALARM CIRCUIT The power supply board requires a 50 kHz signal to generate the various voltages in the system. A 100 kHz, 50 percent duty cycle signal is programmed in the 386EX TIMER 1 unit. It enters the FPGA on pin 119 and is divided by 2 to get 50 kHz.
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Section 14: Main Color Board Digital Theory of Operation Figure 14-14: NPB-4000C Color Motherboard Block Diagram 14-38...
Section 14: Main Color Board Digital Theory of Operation 14.19 CURRENT DRAIN OF DIGITAL ELECTRONICS The worst case current drain has been determined by using the maximum numbers in the data sheets of the devices. Typically the devices operate significantly lower. 386EX 130 mA 16M DRAM...
SECTION 15: POWER SUPPLY - THEORY OF OPERATION 15.1 Overview 15.2 AC Mains Flyback Power Supply 15.3 Battery Charger 15.4 Buck Converter Operation 15.5 Power Devices 15.6 Miscellaneous Control 15.7 System Power Supply 15.8 Mains (AC) LED Operation 15.9 Power Supply Control Logic 15.10 Alarm Section 15.11 NIBP Pump Control 15.12 Safety Devices...
Section 15: Drawings Figure 15-1: Power Supply Block Diagram Control logic on the power supply assembly is responsible for several system functions: • AC and DC charging LED drivers • System ON/OFF control from the front panel membrane switch • Early Warning OFF notification to the processor board •...
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Section 15: Drawings 15.2.1 Overview The AC (mains) power supply accepts 90 to 264 volts RMS at 47 to 63 Hz and provides 18 volts DC at a maximum of 2 amps into the battery charger circuit. The 18 volts DC overrides any supplied external DC (10-16 volts DC) and becomes the dominant source to the charger when both external AC and DC are present.
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Section 15: Drawings volts DC to the flyback circuit. A control IC runs the FET switch, while the transformer (used as an inductor) stores energy and transfers it to the load. 15.2.3 Input filter and Rectifier The input EMI filter consists of an external "canned" EMI filter assembly (common-mode choke plus X capacitors) that is external to the NPB-4000/C power supply PC board, plus an on- board filter consisting of an L1 common-mode choke with C1 and C2 as X capacitors and C7 and C8 as Y...
Section 15: Drawings 15.3 BATTERY CHARGER 15.3.1 Overview The NPB-4000/C power supply contains a battery charger circuit that accepts DC input from either the isolated AC mains flyback circuit or an externally supplied DC input (10 to 16 volts DC). The output of the battery charger provides a current limited, voltage regulated, temperature compensated output to charge a 6 volt, 8 AH lead-acid battery.
Section 15: Drawings Switch current information comes from current transformer T2 that provides a current through R29, which is 1/100 of the main switch current. Thus 1 volt across R29 represents 3.4 amps of switch current. The current waveform is fed through an RC filter (R20, C23) to the controller.
Section 15: Drawings to the basic buck-converter diagram to prevent back driving of the circuit from the battery when not charging. Diode D20 acts as a lightweight "catch" diode for the small inductance of the current transformer. 15.6 MISCELLANEOUS CONTROL The voltage regulation attenuator R28/R25 loads the battery when the circuit is not powered, so voltage sensing of the output voltage occurs using Q6 as a switch to connect attenuator resistor R28 to the output voltage.
Section 15: Drawings Controller U4 is a two-loop controller, current and voltage. Input current information is supplied by transformer T4 which with its 100:1 turns ratio produces 1 volt across R31 at 15.4 amps of peak switch current. Current limit is established by U4 at 1.1 volts or 17 amps peak.
Section 15: Drawings Neither LED is driven until CVREF is up, indicating that sufficient power is reaching the charger. 15.9 POWER SUPPLY CONTROL LOGIC When the battery is initially attached to the power supply, an R/C circuit produces a single positive pulse (PWRRST) which ensures that the power and alarm circuits are initially OFF.
Section 15: Drawings 15.10 ALARM SECTION 15.10.1 Alarm Control When the supply is first turned on, R82 tries to charge C54. During the 300-500 milliseconds charge-up time, it is expected that the supply will come into operation, and the processor board will return sync pulses. The sync pulse will drive Q20 to discharge C54.
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Section 15: Drawings 15.12.1 Watchdog Shutoff Another shutdown path exists for the system supply . When the system supply begins operation, PWRUP goes high, which begins to charge C49 through R65. Eventually (0.5 second), C49 will charge up (through U12) and the system supply will shut off.
Section 16: MP-205 Service Manual; 044540A-0296 16.3 CIRCUIT DESCRIPTION This section provides service personnel with an explanation of the circuit operation for the oximetry module. The text is supported with a schematic diagram, see Figure 17-1. 16.4 Interconnections 16.4.1 Host (Monitor) Interconnect The monitor interface is a 14-pin dual-row header connector, JP5.
Section 16: MP-205 Service Manual; 044540A-0296 16.7 Preamp The current-to-voltage (I-to-V) converter has a gain of -249 K V/A and a low-pass corner frequency of 30 kHz. The voltage amplifier has a gain of -2 V/V and a low-pass corner frequency of 20 kHz. The voltage amplifier is disconnected from the I-to-V converter during LED switching transients to prevent transmission of the switching spikes into the programmable gain amplifier (PGA).
Section 16: MP-205 Service Manual; 044540A-0296 The Red filter circuit components consist of U1A6-8, R19–21, R31, R34–37, C22, C29–30, and C37–38. The IR filter circuit components consist of U1A10-12, R22–24, R32–33, R38–40, C23–24, C31–32, and C39 . The IR filter is identical to the Red filter except for the component values in the last stage.
Section 16: MP-205 Service Manual; 044540A-0296 16.14 Power Decoupling The power supply decoupling circuit consists of R29, R30, C16 through C18, C28, and C26 and C27. 16.15 Status and Timing The LED drive, ALC, demodulator, and demultiplexer require timing signals to operate properly.
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Section 16: MP-205 Service Manual; 044540A-0296 Table 16-1: Oxichip Circuit Pin Descriptions Pin #, Pin Name Signal Description type VSSA 13, AP Analog power return. FR3OUT 14, AO Red filter chain, operational amplifier 3 output. FR3NEG 15, AI Red filter chain, operational amplifier 3 inverting input. FR2OUT 16, AO Red filter chain, operational amplifier 2 output.
Section 16: MP-205 Service Manual; 044540A-0296 Table 16-1: Oxichip Circuit Pin Descriptions Pin #, Pin Name Signal Description type 49, DI Data bit 1, to AD1 50, DI Data bit 0, to AD0 51, DO Overcurrent limit indicator, high indicates current limit has tripped, to U4P4-6.
(labeled TP) on the oximetry module. These waveforms are valuable in tracing signals and locating faults. The user must use a Nellcor SRC-2 pulse oximeter tester. Contact Mallinckrodt Technical Services Department if you have difficulty replicating these waveform examples.
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Section 16: MP-205 Service Manual; 044540A-0296 16.18.8 SRC-2 Settings Rate: 112 Light: High2 Modulation: HIGH Remote/Local: DC RCAL 63 Figure 16-3: MP-205 with an SRC-2 Filter Output 16.18.9 Trace Descriptions CHNL 2 : TP6 Red Filter Output CHNL 1 : TP2 IR Filter Output 16-11...
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Section 16: MP-205 Service Manual; 044540A-0296 16.18.10 SRC-2 Settings Rate: 112 Light: High2 Modulation: HIGH Remote/Local: DC RCAL 63 Figure 16-4: MP-205 with an SRC-2 LED Drive Current Test at TP7 16-12...
16.19.1 General Instructions Pack the module carefully. If the original shipping carton is not available, use another suitable carton or call Mallinckrodt Technical Services Department to obtain a shipping carton. Prior to shipping the device, contact your supplier or your local office Mallinckrodt Technical Services Department for a returned goods authorization (RGA) number.
Section 16: MP-205 Service Manual; 044540A-0296 16.19.3 Repackaging in a Different Carton If the original carton is not available: Place module in antistatic bag. Locate suitable corrugated cardboard shipping carton. Fill bottom of carton with packing material. Place bagged unit on layer of packing material and fill box completely with packing material.
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Section 16: MP-205 Service Manual; 044540A-0296 16.20.2 Measurement Conditions and pulse rate accuracy specifications apply under the following conditions: • Electrosurgical apparatus not used • Patient free of injected intravascular dyes • Insignificant concentration of carboxyhemoglobin and methemoglobin • Sensor at a temperature between 28º C and 42ºC •...
SECTION 17: DRAWINGS 17.1 Overview 17.2 List of Figures 17. DRAWINGS 17.1 OVERVIEW This section contains circuit schematics for the NPB-4000/C patient monitor. 17.2 LIST OF FIGURES Figure No. Title Page Figure 17-1 MP-205 PCB Schematic (Sheet 1 of 2) 17-3 Figure 17-2 MP-205 Schematic PCB (Sheet 2 of 2)