Table 6-2. System Controller Tests; Ping; Ip Address; Count - ADTRAN Atlas 550 User Manual

C S -
LEAR ELF
L
TEST OG
P
ING
IP A
DDRESS
C
OUNT
S
IZE
T
IMEOUT
61200305L1-1
Table 6-2 lists the tests associated with the system controller.
This event... Logs this result...
F Verifies flash memory checksum.
LASH
B R Verifies boot ROM checksum.
OOT OM
DSP RAM Verifies memory associated with the DSP .
RTC RAM Verifies memory associated with the real time clock.
TDM RAM Verifies memory associated with mapping TDM bandwidth.
DRAM Verifies dynamic RAM used for program execution.
HDLC Verifies each HDLC controller used for frame relay or PRI.
Write security: 3; Read security: 5
Clears the self-test log.
Write security: 5; Read security: 5
Allows you to send pings (Internet Control Message Protocol (ICMP)
requests) to devices accessible via the network.
Only one ping session can be active at a time.
Write security: 5; Read security: 5
Specifies the IP address to ping.
Write security: 5; Read security: 5
Specifies the number of pings to send. The default number of tries is 4, and
the maximum value is 99.
Write security: 5; Read security: 5
Specifies the size in bytes of the data portion of the ping request. The
default value is 64 bytes, and the maximum size is 1024 bytes.
Write security: 5; Read security: 5
Specifies the time in milliseconds to wait for the ping reply before timing
out. The default timeout value is three seconds, and the maximum timeout
value is ten seconds.
ATLAS 550 User Manual
Chapter 6. System Control Terminal Menus

Table 6-2. System Controller Tests

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