1MRS757644 F
620 series
Technical Manual
only once and remains within the Start value overload area for 24 hours, the operation
timer and the output ST_OVLOD are reset.
GUID-21B1AE66-D9B1-4F10-9678-45DC0366784A V1 EN
Figure 399:
The behavior of the IDMT timer and the output ST_OVLOD
The ST_DUR_OVLOD output indicates the percentage ratio of the start situation and
the operation time in the Timer 1 module and is available in the monitored data view.
The Timer 1 module is internally blocked for one second after the
capacitor bank is connected by detecting the rising edge of the
CB_CLOSED signal. The CB_CLOSED signal is True when the CB
position is closed.
Alarm level detector
The Alarm level detector compares I_PEAK_INT_x value to Alarm start value. If
the phase or phases in which I_PEAK_INT_x exceeds the setting matches the Num
of start phases setting, the Alarm level detector module activates the Timer 2 module.
The Num of start phases setting is a common setting for both Operate
level detector and Alarm level detector.
Section 4
Protection functions
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