Table 1.2B Common Specifications For Mb89620 Series - Fujitsu F2MC-8L MB89620 Series Hardware Manual

8-bit microcontroller
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Table 1.2b Common Specifications for MB89620 Series

Parameter
CPU functions
Ports
20-bit
timebase timer
Watchdog
timer
8-bit PWM
timer
8-bit pulse
width count
timer
16-bit timer/
counter
8-bit serial
I/O-1,
8-bit serial
I/O-2
Buzzer output Output frequency (1.220 kHz, 2.441 kHz, 4.883 kHz)
External
interrupt
(wake-up)
8-bit A/D
converter
Clock monitor
function
Low-power
consumption
(standby modes)
Process
Note: The clock cycles, conversion times, and other values are for 10 MHz operation.
MB89620 series
Number of instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
Input-only ports:
Output-only ports (N-ch open-drain):
General-purpose I/O ports (N-ch open-
drain):
Output-only ports (CMOS):
General-purpose I/O ports (CMOS):
Total:
20 bits
Interrupt cycle (3.3 ms, 13.1 ms, 52.4 ms, 209.7 ms)
Reset generation cycle (min. 209.7 ms )
8-bit interval timer operation (square wave output capable, operating clock cycle: 0.4 µs to 6.55 ms)
8-bit resolution PWM operation (conversion cycle: 102 µs to 1678 ms
Pulse width count (PWC) timer output for count clock selectable.
8-bit one-shot timer operation (underflow output capable, operating clock cycle: 0.4 µs to 12.8 µs)
8-bit reload timer operation (square wave output capable, operating clock cycle: 0.4 µs to 12.8 µs
8-bit pulse width measurement operation (continuous measurement "H" pulse width/"L" pulse
width /from ↑ to ↑ /from ↓ to ↓ capable)
16-bit timer operation (operating clock cycle: 0.4 µs)
16-bit event counter operation (Rising/falling/both edges selectability)
8 bits
LSB first/MSB first selectability
One clock selectable from four transfer clocks (one external shift clock, three internal shift clocks:
0.8 µs, 3.2 µs, 12.8 µs)
4 independent channels (interrupt vector, request flag, request output enable)
Edge selectability (rising/falling)
Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop mode.)
8-bit resolution × 8 channels
A/D conversion function (conversion time: 17.6 µs
Sense function (comparison time: 4.8 µs
Continuous activation by an external clock or a timebase timer output capable
Reference voltage input (AVR)
Outputs the divide-by-two source oscillation (5 MHz).
Sleep mode, stop mode
CMOS
Specification
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.4 µs/10 MHz
3.6 µs/10 MHz
5 (4 ports also serve as an external interrupt input.)
8 (All also serve an analog input.)
8 (4 ports also serve as peripherals.)
8 (All also serve as external bus control pins.)
24 (16 ports also serve as external bus pins and the
other ports also serve as peripherals.)
53
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CHAPTER 1 OVERVIEW
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5

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