Fujitsu F2MC-8L MB89620 Series Hardware Manual page 15

Figure 10.3a Block Diagram of 8-bit Serial I/O-1 Pins ........................................................................... 203
Figure 10.3b 8-bit Serial I/O-1 Registers ............................................................................................... 203
Figure 10.3.1 Serial 1 Mode Register (SMR1) ....................................................................................... 204
Figure 10.3.2 Serial 1 Data Register (SDR1) ......................................................................................... 206
Figure 10.4a Block Diagram of 8-bit Serial I/O-2 Pins ........................................................................... 209
Figure 10.4b 8-bit Serial I/O-2 Registers ............................................................................................... 209
Figure 10.4.1 Serial 2 Mode Register (SMR2) ....................................................................................... 210
Figure 10.4.2 Serial 2 Data Register (SDR2) ......................................................................................... 212
Figure 10.6a Serial Output Settings (When Using Internal Shift Clock) ................................................. 214
Figure 10.6b Serial Output Settings (When Using External Shift Clock) ............................................... 214
Figure 10.6c 8-bit Serial Output Operation ............................................................................................ 215
Figure 10.7a Serial Input Settings (When Using Internal Shift Clock) ................................................... 216
Figure 10.7b Serial Input Settings (When Using External Shift Clock) .................................................. 216
Figure 10.7c 8-bit Serial Input Operation ............................................................................................... 217
Figure 10.8a Operation in Sleep Mode (Internal Shift Clock) ................................................................ 218
Figure 10.8b Operation in Stop Mode (Internal Shift Clock) .................................................................. 218
Figure 10.8c Operation During Halt (Internal Shift Clock) ...................................................................... 218
Figure 10.8d Operation in Sleep Mode (External Shift Clock) ............................................................... 219
Figure 10.8e Operation in Stop Mode (External Shift Clock) ................................................................. 219
Figure 10.8f Operation during Halt (External Shift Clock) ...................................................................... 219
Figure 10.9 Idle State of Shift Clock ...................................................................................................... 220
Figure 10.10a Connection Example for 8-bit Serial I/O (Interface between Two MB89620s) ............... 221
Figure 10.10b Bidirectional Serial I/O Operation ................................................................................... 221
CHAPTER 11 BUZZER OUTPUT ...................................................................................... 225
Figure 11.2 Block Diagram of Buzzer Output ........................................................................................ 227
Figure 11.3a Block Diagram of P44/BZ Pin ........................................................................................... 228
Figure 11.3b Buzzer Output Register .................................................................................................... 228
Figure 11.4 Buzzer Register (BZCR) ..................................................................................................... 229
CHAPTER 12 EXTERNAL INTERRUPT CIRCUIT (EDGE) ............................................... 231
Figure 12.2 Block Diagram of External Interrupt Circuit ......................................................................... 233
Figure 12.3a Block Diagram of External Interrupt Circuit Pins ............................................................... 234
Figure 12.3b External Interrupt Circuit Registers ................................................................................... 235
Figure 12.3.1 External Interrupt 1 Control Register (EIC1) .................................................................... 236
Figure 12.3.2 External Interrupt 2 Control Register (EIC2) .................................................................... 238
Figure 12.5a External Interrupt Circuit Settings ..................................................................................... 241
Figure 12.5b External Interrupt (INT1) Operation .................................................................................. 241
CHAPTER 13 A/D CONVERTER ....................................................................................... 243
Figure 13.2 Block Diagram of A/D Converter ......................................................................................... 246
MB89620 series
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