Figure 4.5 Block Diagram Of Port 4 Pin - Fujitsu F2MC-8L MB89620 Series Hardware Manual

n Block Diagram of Port 4 Pin
SPL: Pin state specification bit in the standby control register (STBC)
Check: • Peripheral inputs continuously are input the pin value. Also, enabling the output enable bit of a
•
n Port 4 Registers
The port 4 register consists of PDR4.
Each bit in the register has a one-to-one relationship with a port 4 pin.
Table 4.5b shows the correspondence between the pins and register for port 4.
Table 4.5b Correspondence between Pin and Register for Port 4
Port
Port 4
MB89620 series
PDR (Port data register)
PDR read
PDR read (for bit manipulation instructions)
Output latch
PDR write

Figure 4.5 Block Diagram of Port 4 Pin

peripheral forcibly sets the pin as a peripheral output rather than a port output.
The products that can be set with a pull-up resistor (optional) are the MB89627, MB89625,
MB89626, MB89627, MB89628R, and MB89629R.
PDR4
Corresponding pin
From
peripheral From peripheral
output enable bit
output
Input buffer
Stop mode (SPL=1)
Correspondence between register bit and pin
Bit 7 Bit 6 Bit 5
P47 P46 P45
To peripheral
input
Pull-up resistor
(optional)
Approx. 50 kΩ/5.0 V
Pin
Output
Tr
Bit 4 Bit 3 Bit 2 Bit 1
P44 P43 P42 P41
CHAPTER 4 I/O PORTS
Bit 0
P40
105