Fujitsu F2MC-8L MB89620 Series Hardware Manual page 166

Table 7.3.1 PWM Control Register (CNTR) Bits
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MB89620 series
Bit
This bit switches between the interval timer function (P/TX = "0") and PWM timer
P/TX: function (P/TX = "1").
Operating mode Check: Write to this bit when the counter operation is stopped (TPE = "0"),
selection bit
• The read value is indeterminate.
Unused bit
• Writing to this bit has no effect on the operation.
• These bits select the count clock for the interval timer function and PWM timer
function.
• These bits can select the count clock from three internal count clocks or the
P1, P0:
output cycle of the pulse width count timer (PWC).
Clock selection bits
• If the PWC output is selected, operate the pulse width count timer in reload
timer mode of the interval timer function(PCR2: FC = "0", RM = "0").
Check: Do not change P1 and P0 when the counter is operating (TPE = "1").
• This bit activates or stops operation of the PWM timer function and interval
TPE:
timer function.
Counter operation
• Writing "1" to this bit starts the count operation. Writing "0" to this bit stops the
enable bit
count and clears the counter to "00
• For the interval timer function:
This bit is set to "1" when the counter and PWM compare register (COMR)
values match.
TIR: An interrupt request is output to the CPU when both this bit and the interrupt
Interrupt request flag request enable bit (TIE) are "1".
bit • For the PWM timer function:
Interrupt requests are not generated.
• Writing "0" clears this bit. Writing "1" has no effect and does not change the bit
value.
• The P37/PTO pin functions as a general-purpose port (P37) when this bit is set
OE: to "0", and a dedicated pin (PTO) when this bit is set to "1".
Output pin control bit • The PTO pin outputs a square wave when the interval timer function is selected
and a PWM waveform when the PWM timer function is selected.
TIE:
This bit enables or disables an interrupt request output to the CPU. An interrupt
Interrupt request
request is output when both this bit and the interrupt request flag bit (TIR) are "1".
enable bit
Function
interrupts are disabled (TIE = "0"), and the interrupt request flag bit is
cleared (TIR = "0").
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CHAPTER 7 8-BIT PWM TIMER
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