Figure 13.5C Sense Function (Software Activation) Settings; Figure 13.5D Sense Function (Continuous Activation) Settings - Fujitsu F2MC-8L MB89620 Series Hardware Manual

n Activating Sense Function
l Software activation
Figure 13.5c shows the settings required for software activation of the sense function.
On activation the sense function starts the operation of the sense function.
l Continuous activation
Figure 13.5d shows the settings required for continuous activation of the sense function.
When continuous activation is enabled, the rising edge of the selected input clock activates the
sense function, starting operation of the sense function. When continuous activation is disabled
(ADC2: EXT = "0"), continuous activation stops but software activation is available.
n Operation of Sense Function
The following describes the operation of the sense function. From activation to completion of the
sense function requires approximately 12 instruction cycles.
(1) On activation, the sense function sets the conversion-in-progress flag bit (ADC1: ADMV =
"1") and connects the sample hold circuit to the specified analog input pin.
(2) The internal sample hold capacitor captures the voltage at the analog input pin for
approximately 8 instruction cycles. The capacitor holds the voltage until the comparison
completes.
(3) The comparator compares the voltage captured by the sample hold capacitor with the
voltage corresponding to the value set in the ADCD register.
(4) When voltage comparison completes, the interrupt request flag bit is set (ADC1: ADI = "1") if
the input voltage matches the condition specified by the compare condition setting bit
(ADC1: SIFM). The ADI bit does not change if the input voltage does not match the specified
condition or if the input voltage and set voltage are equal.
Note: For the sense function, an interrupt request is not generated when comparison completes if the
comparison condition is not matched. Whether or not comparison has completed can be determined by
checking whether the conversion-in-progress flag bit (ADC1: ADMV) is "0".
MB89620 series
Bit 7 Bit 6
ADC1 ANS3 ANS2
0
ADC2 — —
ADC3

Figure 13.5c Sense Function (Software Activation) Settings

Bit 7 Bit 6
ADC1 ANS3 ANS2
0
ADC2 — —
ADC3

Figure 13.5d Sense Function (Continuous Activation) Settings

Bit 5 Bit 4 Bit 3 Bit 2
ANS1 ANS0 ADI ADMV
— ADCK ADIE ADMD
×
1
Sets the compare voltage.
Bit 5 Bit 4 Bit 3 Bit 2
ANS1 ANS0 ADI ADMV
— ADCK ADIE ADMD
1
Sets the compare voltage.
CHAPTER 13 A/D CONVERTER
Bit 1 Bit 0
SIFM AD
1
EXT RESV1
0 1 : Used bit
× : Unused bit
1 : Set "1".
0 : Set "0".
Bit 1 Bit 0
SIFM AD
×
EXT RESV1
: Used bit
1 1
× : Unused bit
1 : Set "1".
0 : Set "0".
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