Multiplexed Bluetooth Gpio Signals - Infineon Cypress CYW43353 Manual

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12.3.1 Multiplexed Bluetooth GPIO Signals

The Bluetooth GPIO pins (BT_GPIO_0 to BT_GPIO_7) are multiplexed pins and can be programmed to be used as GPIOs or for other Bluetooth interface signals such as
2
I
S. The specific function for a given BT_GPIO_X pin is chosen by programming the Pad Function Control register for that specific pin.
for each BT_GPIO_X pin. Note that each BT_GPIO_X pin's Pad Function Control register setting is independent (BT_GPIO_1 can be set to pad function 7 at the same time
that BT_GPIO_3 is set to pad function 0). When the Pad Function Control register is set to 0, the BT_GPIOs do not have specific functions assigned to them and behave as
generic GPIOs. The A_GPIO_X pins described below are multiplexed behind the CYW43353's PCM and I
Table 19. GPIO Multiplexing Matrix
Pin Name
BT_UART_CTS_N
UART_CTS_N
BT_UART_RTS_N
UART_RTS_N
BT_UART_RXD
UART_RXD
BT_UART_TXD
UART_TXD
BT_PCM_IN
A_GPIO[3]
BT_PCM_OUT
A_GPIO[2]
BT_PCM_SYNC
A_GPIO[1]
BT_PCM_CLK
A_GPIO[0]
BT_I2S_DO
A_GPIO[5]
BT_I2S_DI
A_GPIO[6]
BT_I2S_WS
GPIO[7]
BT_I2S_CLK
GPIO[6]
BT_GPIO_1
GPIO[1]
BT_GPIO_0
GPIO[0]
CLK_REQ
WL/BT_CLK_REQ
The multiplexed GPIO signals are described in
Document Number: 002-14949 Rev. *G
0
1
PCM_IN
PCM_IN
PCM_OUT
PCM_OUT
PCM_SYNC
PCM_SYNC
PCM_CLK
PCM_CLK
PCM_OUT
PCM_IN
PCM_SYNC
PCM_CLK
Table
20.
PRELIMINARY
Pad Function Control Register Setting
2
3
HCLK
LINK_IND
HCLK
INT_LPO
I2S_SSDO
HCLK
I2S_SSDI/MSDI
LINK_IND
INT_LPO
clk_12p288
Table 19
2
S interface pins.
4
5
6
A_GPIO[1]
A_GPIO[0]
I2S_SSDI/MSDI
I2S_MSDO
I2S_SSDO
I2S_MWS
I2S_SWS
I2S_MSCK
I2S_SSCK
I2S_MSDO
TX_CON_FX
I2S_MWS
I2S_SWS
I2S_MSCK
I2S_SSCK
CLASS1[2]
A_GPIO[7]
CYW43353
shows the possible options
7
15
GPIO[5]
GPIO[4]
SF_MISO
SF_MOSI
SF_SPI_CSN
SF_SPI_CLK
STATUS
Page 63 of 113

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