Infineon Cypress CYW43353 Manual page 3

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Features
IEEE 802.11x Key Features
IEEE 802.11ac compliant.
Single-stream spatial multiplexing up to 433.3 Mbps data
rate.
Supports 20, 40, and 80 MHz channels with optional SGI
(256 QAM modulation).
Full IEEE 802.11a/b/g/n legacy compatibility with enhanced
performance.
Tx and Rx low-density parity check (LDPC) support for
improved range and power efficiency.
Supports Rx space-time block coding (STBC)
Supports IEEE 802.11ac/n beamforming.
On-chip power amplifiers and low-noise amplifiers for both
bands.
Support for optional front-end modules (FEM) with external
PAs and LNAs
Shared Bluetooth and WLAN receive signal path eliminates
the need for an external power splitter while maintaining
excellent sensitivity for both Bluetooth and WLAN.
Internal fractional nPLL allows support for a wide range of
reference clock frequencies
Supports IEEE 802.15.2 external coexistence interface to
optimize bandwidth utilization with other co-located wireless
technologies such as LTE, GPS, or WiMAX
Supports standard SDIO v3.0 (including DDR50 mode at
50 MHz and SDR104 mode at 208 MHz, 4-bit and 1-bit), and
gSPI (48 MHz) host interfaces.
Backward compatible with SDIO v2.0 host interfaces.
Document Number: 002-14949 Rev. *G
PRELIMINARY
Integrated ARMCR4
ory for complete WLAN subsystem functionality, minimizing
the need to wake up the applications processor for standard
WLAN functions. This allows for further minimization of
power consumption, while maintaining the ability to field
upgrade with future features. On-chip memory includes 768
KB SRAM and 640 KB ROM.
OneDriver
existing embedded WLAN and Bluetooth devices as well as
future devices.
Bluetooth Key Features
Complies with Bluetooth Core Specification Version 4.1 for
automotive and industrial applications with provisions for sup-
porting future specifications.
Bluetooth Class 1 or Class 2 transmitter operation.
Supports extended synchronous connections (eSCO), for
enhanced voice quality by allowing for retransmission of
dropped packets.
Adaptive frequency hopping (AFH) for reducing radio fre-
quency interference.
Interface support, host controller interface (HCI) using a
high-speed UART interface and PCM for audio data.
Supports multiple simultaneous Advanced Audio Distribution
Profiles (A2DP) for stereo sound.
Automatic frequency detection for standard crystal and
TCXO values.
Supports low energy host wake-up for long term system
sleep capability.
processor with tightly coupled mem-
software architecture for easy migration from
CYW43353
Page 2 of 113

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